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SubjectRe: MMC: Make the configuration memory resource optional
On Wed, 5 Aug 2009, Ian Molton wrote:

> Guennadi Liakhovetski wrote:
>
> > How do we verify this? Do I need some "very fast" card, so that sd would try
> > to drive the clock beyond pdata->hclk / 2, which should then fail?
>
> One way would be a 'scope on the card pins, but since you havent said I am
> assuming you have not altered the clock-speed setting routine.
>
> Here you can see why I didnt like the silently-drop-conf-accesses version of
> the patch. If you had not made conf area accesses silently succeed, you'd
> have found one lurking in the set_clock function.
>
> Since your controller has no CNF area, it was discarding the write to the 1:1
> clock bit (that isnt in its none-existant conf area) and thus you got the
> next lowest clock as a result (/2)
>
> > Currently I'm using 24MHz (copied from the original driver), and the only
> > thing I know about the controller is its "Maximum operating frequency: 25
> > MHz."
>
> Thats the HCLK frequency, not the card clock.

Sure, and the card clock is derived from the HCLK, as you describe below.

> the TMIO MFD devices can divide this HCLK by anything from 512 to 2, and MFD
> devices have a facility to disable the divider, yielding full HCLK speed as
> the card clock.
>
> If you havent already found a 1:1 clock enable bit on your device, you might
> try looking for it - it'd yield a near linear factor-of-two speed increase.

I think, even getting the driver work with half the maximum speed (without
the 1:1 speed) would be a good progress for SH. And I personally have no
idea how I could "find" that divider-disable bit. Please notice, that I'm
away for a week starting tomorrow, hopefully, Magnus will be able to
further work with you on this during this time.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/

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