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SubjectRe: kernel page table mapping for >1GB <3 GB for x86 arch without PAE
O> I understand the implications of reloading CR3. But once the page tables are  setup to map all the available physical RAM to virtual (linear) address it could be for eg. 1, 2, 3 or 4 GB how does it matter.

Where are you putting the user virtual addresses. User addresses don't
map direct to physical addresses so you need both sets of translations at

Right now you have

0-3GB MMU translations to arbitary basically random
physical addresses (with many pages shared and some absent)

3GB+ Physical mapping only accessible in kernel mode

If user applications ran with a 1:1 mapping of application space to
physical addresses you would be fine - but they don't and it would be
rather hard to run like that because you want page sharing, lazy unshare,
vfork etc to all work.

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