Messages in this thread Patch in this message | | | Subject | Re: [RFC patch] need check TSC wrap unconditionally | From | Peter Zijlstra <> | Date | Fri, 21 Aug 2009 18:37:58 +0200 |
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On Fri, 2009-08-14 at 12:15 +0800, Luming Yu wrote: > Hi there,
Hi, thanks for CC'ing the right folks.
> we disabled tsc wrap check on any platform that has NOSTOP_TSC cpu. But this > will cause some real problem.For example, 1.CPU does has constant and > non_stop tsc, which means different CPU ticks at same rate in same domain,but > have been given different initial TSC value.Then at any given time, > CPUsare unsynchronized. > 2. if those CPUs are sit in different domain..(multi-chassis cluster system?) > > Please review. If make sense, please apply.
Right, so because your machine is funny, everybody with a good machine should suffer?
If the TSCs run at identical frequency (one time domain) but at different offsets, you can fix that by using cyc2ns_offset.
When the machine has unsynchonized frequencies (multiple time domains), detect that during cpu enumeration and use that to disable the optimization.
> Signed-off-by: Yu Luming <luming.yu@intel.com>
> arch/x86/kernel/tsc_sync.c | 7 +------ > 1 file changed, 1 insertion(+), 6 deletions(-) > > diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c > index 027b5b4..312ba84 100644 > --- a/arch/x86/kernel/tsc_sync.c > +++ b/arch/x86/kernel/tsc_sync.c > @@ -113,11 +113,6 @@ void __cpuinit check_tsc_sync_source(int cpu) > if (unsynchronized_tsc()) > return; > > - if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) { > - pr_info("Skipping synchronization checks as TSC is > reliable.\n"); > - return; > - } > - > pr_info("checking TSC synchronization [CPU#%d -> CPU#%d]:", > smp_processor_id(), cpu); > > @@ -171,7 +166,7 @@ void __cpuinit check_tsc_sync_target(void) > { > int cpus = 2; > > - if (unsynchronized_tsc() || boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) > + if (unsynchronized_tsc()) > return; > > /*
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