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SubjectRe: Add support for the SST 39VF3202, 39VF6401B and 39VF6402B flash chips
From
Add support for the SST 39VF3202, 39VF6401B and 39VF6402B flash chips

- extend struct amd_flash_info to enable 8 erase regions for 8MiB flash chips
- change erase block command to 0x50 due to the differences
between 39VF6401/02 and 39VF6401B/02B chips. Refer to the
corresponding data sheets
Table 6 -> 6th bus write cycle:
39VF6401B data sheet http://www.sst.com/downloads/datasheet/S71288.pdf
39VF6401 data sheet http://www.sst.com/downloads/datasheet/S71223-03.pdf

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>

Index: linus/drivers/mtd/chips/cfi_cmdset_0002.c
===================================================================
--- linus.orig/drivers/mtd/chips/cfi_cmdset_0002.c
+++ linus/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -50,6 +50,8 @@
#define SST49LF004B 0x0060
#define SST49LF040B 0x0050
#define SST49LF008A 0x005a
+#define SST39VF6401B 0x236D
+#define SST39VF6402B 0x236C
#define AT49BV6416 0x00d6

static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t
*, u_char *);
@@ -1629,7 +1631,11 @@ static int __xipram do_erase_oneblock(st
cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi,
cfi->device_type, NULL);
cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi,
cfi->device_type, NULL);
cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi,
cfi->device_type, NULL);
- map_write(map, CMD(0x30), adr);
+
+ if (cfi->mfr == MANUFACTURER_SST && (cfi->id == SST39VF6401B ||
cfi->id == SST39VF6402B))
+ map_write(map, CMD(0x50), adr);
+ else
+ map_write(map, CMD(0x30), adr);

chip->state = FL_ERASING;
chip->erase_suspended = 0;
Index: linus/drivers/mtd/chips/jedec_probe.c
===================================================================
--- linus.orig/drivers/mtd/chips/jedec_probe.c
+++ linus/drivers/mtd/chips/jedec_probe.c
@@ -160,6 +160,9 @@
#define SST39LF160 0x2782
#define SST39VF1601 0x234b
#define SST39VF3201 0x235b
+#define SST39VF3202 0x235a
+#define SST39VF6401B 0x236D
+#define SST39VF6402B 0x236C
#define SST39LF512 0x00D4
#define SST39LF010 0x00D5
#define SST39LF020 0x00D6
@@ -273,7 +276,7 @@ struct amd_flash_info {
const uint8_t dev_size;
const uint8_t nr_regions;
const uint16_t cmd_set;
- const uint32_t regions[6];
+ const uint32_t regions[8];
const uint8_t devtypes; /* Bitmask for x8, x16 etc. */
const uint8_t uaddr; /* unlock addrs for 8, 16, 32, 64 */
};
@@ -1519,6 +1522,59 @@ static const struct amd_flash_info jedec
ERASEINFO(0x1000,256)
}
}, {
+ .mfr_id = MANUFACTURER_SST, /* should be CFI */
+ .dev_id = SST39VF3202,
+ .name = "SST 39VF3202",
+ .devtypes = CFI_DEVICETYPE_X16,
+ .uaddr = MTD_UADDR_0xAAAA_0x5555,
+ .dev_size = SIZE_4MiB,
+ .cmd_set = P_ID_AMD_STD,
+ .nr_regions = 4,
+ .regions = {
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256)
+ }
+ }, {
+ .mfr_id = MANUFACTURER_SST, /* should be CFI */
+ .dev_id = SST39VF6401B,
+ .name = "SST 39VF6401B",
+ .devtypes = CFI_DEVICETYPE_X16,
+ .uaddr = MTD_UADDR_0x0AAA_0x0555,
+ .dev_size = SIZE_8MiB,
+ .cmd_set = P_ID_AMD_STD,
+ .nr_regions = 8,
+ .regions = {
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ }
+ }, {
+ .mfr_id = MANUFACTURER_SST, /* should be CFI */
+ .dev_id = SST39VF6402B,
+ .name = "SST 39VF6402B",
+ .devtypes = CFI_DEVICETYPE_X16,
+ .uaddr = MTD_UADDR_0x0AAA_0x0555,
+ .dev_size = SIZE_8MiB,
+ .cmd_set = P_ID_AMD_STD,
+ .nr_regions = 8,
+ .regions = {
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ ERASEINFO(0x1000,256),
+ }
+ }, {
.mfr_id = MANUFACTURER_SST,
.dev_id = SST36VF3203,
.name = "SST 36VF3203",

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