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SubjectRe: Who's responsible for configuring CLS on a cardbus device?
On Tue, May 26, 2009 at 02:23:00PM +0100, Alan Cox wrote:
...
> > This is solvable by simply setting CLS to the correct value but who's
> > job is it? For non-hotplug devices, this is configured by the BIOS
> > (at least on PC), so for hotplug devices I think falls on the lap of
> > the PCI code but I'm not sure. If this is something which the
> > sata_sil driver should be responsible for, is there an established way
> > to determine the proper CLS value?
>
> Currently its handled by pci_set_mwi() but there isn't actually a more
> direct way to do this.

There isn't for the drivers because BIOS is supposed to set
PCI_CACHE_LINE_SIZE.

If the BIOS isn't setting PCI_CACHE_LINE_SIZE, the arch specific
pci support should be checking PCI_CACHE_LINE_SIZE and/or setting
it in pcibios_set_master().

hth,
grant


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