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SubjectRe: [perfmon2] comments on Performance Counters for Linux (PCL)
Ingo Molnar writes:

> * Corey Ashford <> wrote:
> >> So you're suggesting to artificually strech periods by say
> >> composing a single overflow from smaller ones, ignoring the
> >> intermediate overflow events?
> >>
> >> That sounds doable, again, patch welcome.
> >
> > I definitely agree with Stephane's point on this one. I had
> > assumed that long irq_periods (longer than the width of the
> > counter) would be synthesized as you suggest. If this is not the
> > case, PCL should be changed so that it does, -or- at a minimum,
> > the user should get an error back stating that the period is too
> > long for the hardware counter.
> this looks somewhat academic - at least on x86, even the fastest
> events (say cycles) with a 32 bit overflow means one event per
> second on 4GB. That's not a significant event count in practice.
> What's the minimum width we are talking about on Power?

32 bits, but since the top bit is effectively a level-sensitive
interrupt request, the maximum period in hardware is 2^31 counts.

However, I already support 64-bit interrupt periods (well, 63-bit
actually) on powerpc by only calling perf_counter_overflow() when
counter->hw.period_left becomes <= 0, and arranging to set the
hardware counter to 0 if counter->hw.period_left is >= 0x80000000.
It's a tiny amount of code to handle it, really.


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