[lkml]   [2009]   [May]   [28]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: [perfmon2] comments on Performance Counters for Linux (PCL)

* Corey Ashford <> wrote:

> Just a few comments below on some excerpts from this very good discussion.
> Peter Zijlstra wrote:
>> On Thu, 2009-05-28 at 16:58 +0200, stephane eranian wrote:
>>> - uint64_t irq_period
>>> IRQ is an x86 related name. Why not use smpl_period instead?

irq is not an x86 related name at all. There's thousands of uses of
it even in arch/powerpc:

earth4:~/tip> git grep -i irq arch/powerpc/ | wc -l

>> don't really care, but IRQ seems used throughout linux, we could
>> name the thing interrupt or sample period.
> I agree with Stephane, the name irq_period struck me as somewhat
> strange for what it does. sample_period would be much better.

sample_period would be fine - but smpl_period definitely not ;-)

>>> - uint32_t record_type
>>> This field is a bitmask. I believe 32-bit is too small to
>>> accommodate future record formats.
>> It currently controls 8 aspects of the overflow entry, do you
>> really forsee the need for more than 32?
> record_type is probably not the best name for this either. Maybe
> "record_layout" or "sample_layout" or "sample_format" (to go along
> with read_format)

'record' is pretty established for this - so record_layout would be
fine. Peter?

>>> I would assume that on the read() side, counts are accumulated as
>>> 64-bit integers. But if it is the case, then it seems there is an
>>> asymmetry between period and counts.
>>> Given that your API is high level, I don't think tools should have to
>>> worry about the actual width of a counter. This is especially true
>>> because they don't know which counters the event is going to go into
>>> and if I recall correctly, on some PMU models, different counters can
>>> have different width (Power, I think).
>>> It is rather convenient for tools to always manipulate counters as
>>> 64-bit integers. You should provide a consistent view between counts
>>> and periods.
>> So you're suggesting to artificually strech periods by say
>> composing a single overflow from smaller ones, ignoring the
>> intermediate overflow events?
>> That sounds doable, again, patch welcome.
> I definitely agree with Stephane's point on this one. I had
> assumed that long irq_periods (longer than the width of the
> counter) would be synthesized as you suggest. If this is not the
> case, PCL should be changed so that it does, -or- at a minimum,
> the user should get an error back stating that the period is too
> long for the hardware counter.

this looks somewhat academic - at least on x86, even the fastest
events (say cycles) with a 32 bit overflow means one event per
second on 4GB. That's not a significant event count in practice.
What's the minimum width we are talking about on Power?


 \ /
  Last update: 2009-05-28 23:39    [W:0.176 / U:3.080 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site