Messages in this thread | | | From | Kevin Cernekee <> | Date | Tue, 26 May 2009 16:57:34 -0700 | Subject | [PATCH 0/1] MIPS: Disable address swizzling on __raw MMIO operations |
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I have a big-endian MIPS32-based ASIC configured as follows:
CONFIG_SWAP_IO_SPACE is not set
mangle-port.h says:
#define __swizzle_addr_b(port) ((port) ^ 3) #define __swizzle_addr_w(port) ((port) ^ 2) #define __swizzle_addr_l(port) (port) #define __swizzle_addr_q(port) (port)
(copied from mach-ip32/mangle-port.h)
The PCI drivers use {read,write}[bwl]. PCI byte and word (16-bit) accesses are address-swizzled but not endian-swapped. Since 32-bit accesses are the common case, this generates the most efficient code.
The MTD drivers (in my case, physmap) use __raw_{read,write}[bwl]. This is a problem because on MIPS, the __raw functions still enable address swizzling.
I am submitting a patch to disable address swizzling for the __raw operations.
There are currently three other MIPS platforms using address swizzling:
txx9/jmr3927 only uses the swizzle facility to make the rtc-ds1742 driver work. This driver uses standard (non-__raw) readb() operations, which will continue to function normally with my patch in place.
sgi-ip27 swizzles 16-bit PCI word addresses but not byte addresses. It only registers a single platform_device (rtc-m48t35) which has no __raw operations.
sgi-ip32 swizzles both 16-bit and 8-bit PCI addresses. It registers the following platform_device's:
8250 - uses standard read/write operations meth - uses volatile struct accesses only sgio2audio - uses readq/writeq sgi_btns - uses readq/writeq rtc_cmos - uses inb_p/outb_p
Based on this information, I do not believe that my change will have an adverse impact on any other systems.
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