lkml.org 
[lkml]   [2009]   [May]   [2]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    Date
    From
    SubjectRe: [patch 2/2] x86 amd fix cmpxchg read acquire barrier
    * Pavel Machek (pavel@ucw.cz) wrote:
    > On Wed 2009-04-22 16:18:54, Mathieu Desnoyers wrote:
    > > http://google-perftools.googlecode.com/svn-history/r48/trunk/src/base/atomicops-internals-x86.cc
    > >
    > > says
    > >
    > > " // Opteron Rev E has a bug in which on very rare occasions a locked
    > > // instruction doesn't act as a read-acquire barrier if followed by a
    > > // non-locked read-modify-write instruction. Rev F has this bug in
    > > // pre-release versions, but not in versions released to customers,
    > > // so we test only for Rev E, which is family 15, model 32..63 inclusive.
    >
    > Could we be more careful here and catch the F pre-release versions,
    > too? Stepping should help there...
    >

    Yes, I guess for F pre-releases we're stucked unless AMD provides more
    information. Dtrace did not seem to bother about F pre-release versions
    though, neither did Google.

    Mathieu

    > --
    > (english) http://www.livejournal.com/~pavelmachek
    > (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

    --
    Mathieu Desnoyers
    OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68


    \
     
     \ /
      Last update: 2009-05-02 17:57    [W:0.025 / U:180.736 seconds]
    ©2003-2016 Jasper Spaans. hosted at Digital OceanAdvertise on this site