Messages in this thread | | | Date | Sat, 2 May 2009 11:55:14 -0400 | From | Mathieu Desnoyers <> | Subject | Re: [patch 2/2] x86 amd fix cmpxchg read acquire barrier |
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* Pavel Machek (pavel@ucw.cz) wrote: > On Wed 2009-04-22 16:18:54, Mathieu Desnoyers wrote: > > http://google-perftools.googlecode.com/svn-history/r48/trunk/src/base/atomicops-internals-x86.cc > > > > says > > > > " // Opteron Rev E has a bug in which on very rare occasions a locked > > // instruction doesn't act as a read-acquire barrier if followed by a > > // non-locked read-modify-write instruction. Rev F has this bug in > > // pre-release versions, but not in versions released to customers, > > // so we test only for Rev E, which is family 15, model 32..63 inclusive. > > Could we be more careful here and catch the F pre-release versions, > too? Stepping should help there... >
Yes, I guess for F pre-releases we're stucked unless AMD provides more information. Dtrace did not seem to bother about F pre-release versions though, neither did Google.
Mathieu
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