Messages in this thread | | | Date | Sat, 2 May 2009 20:32:56 -0400 | From | Aristeu Rozanski <> | Subject | Re: [RFC PATCH 00/21 v2] amd64_edac: EDAC module for AMD64 |
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> I thought I should summarize some points on the design direction, which, > in my impression are what all the parties involved more or less would > agree on: > > * mce interrupt delivers, if EDAC compiled in, the required batch of > dumped MSRs to chipset/CPU specific EDAC driver. Aristeu, I guess you > guys have some code on that, right? it's in really early stage and like Andi said, it needs work.
> * EDAC module decodes MCE info, computes the DIMM label out of > that. Additional hw setup stuff like memory hoisting/interleaving, > ganged/unganged MC mode, testing infrastructure like DRAM error > injection and all that pertaining to the specific hw is handled by the > EDAC module. > > * If EDAC not enabled, mce operates as before. agreed.
-- Aristeu
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