Messages in this thread Patch in this message | | | Subject | [PATCH 6/10 -tip] x86: early_init_intel() user of Advanced Power Management features | From | Jaswinder Singh Rajput <> | Date | Tue, 12 May 2009 21:11:48 +0530 |
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use X86_FEATURE_CONSTANT_TSC to determine TSC Invariance
Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> --- arch/x86/kernel/cpu/intel.c | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 7437fa1..62130a0 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -61,14 +61,14 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) c->x86_phys_bits = 36; /* - * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate - * with P/T states and does not stop in deep C-states. + * Advanced power management is 8000_0007 edx. + * Bit 8 is TSC runs at constant rate with P/T states + * and does not stop in deep C-states. * * It is also reliable across cores and sockets. (but not across * cabinets - we turn it off in that case explicitly.) */ - if (c->x86_power & (1 << 8)) { - set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); + if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) { set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC); set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE); sched_clock_stable = 1; -- 1.6.0.6
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