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SubjectRe: TSC unstable on Intel Pentium M processor 750
On Thu, 30 Apr 2009, Mao Yilu wrote:
> > On Thu, 30 Apr 2009, Mao Yilu wrote:
> > > But I still don't know why the TSC is not correct in the C1 state (hlt
> > > instruction). Is there anything more to influence the TSC? What happened
> > > when the CPU is not running under hlt instruction?
> >
> > SMIs? Laptops love that crap...
>
> What is SMIs?

http://en.wikipedia.org/wiki/System_Management_Mode

--
"One disk to rule them all, One disk to find them. One disk to bring
them all and in the darkness grind them. In the Land of Redmond
where the shadows lie." -- The Silicon Valley Tarot
Henrique Holschuh


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