lkml.org 
[lkml]   [2009]   [Apr]   [29]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    Date
    From
    SubjectRe: [PATCH 26/29] x86/perfcounters: introduce max_period variable

    * Robert Richter <robert.richter@amd.com> wrote:

    > In x86 pmus the allowed counter period to programm differs. This
    > introduces a max_period value and allows the generic implementation
    > for all models to check the max period.
    >
    > Signed-off-by: Robert Richter <robert.richter@amd.com>
    > ---
    > arch/x86/kernel/cpu/perf_counter.c | 20 ++++++++++++--------
    > 1 files changed, 12 insertions(+), 8 deletions(-)
    >
    > diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
    > index a8a53ab..4b8715b 100644
    > --- a/arch/x86/kernel/cpu/perf_counter.c
    > +++ b/arch/x86/kernel/cpu/perf_counter.c
    > @@ -54,6 +54,7 @@ struct x86_pmu {
    > int num_counters_fixed;
    > int counter_bits;
    > u64 counter_mask;
    > + u64 max_period;
    > };
    >
    > static struct x86_pmu x86_pmu __read_mostly;
    > @@ -279,14 +280,8 @@ static int __hw_perf_counter_init(struct perf_counter *counter)
    > hwc->nmi = 1;
    >
    > hwc->irq_period = hw_event->irq_period;
    > - /*
    > - * Intel PMCs cannot be accessed sanely above 32 bit width,
    > - * so we install an artificial 1<<31 period regardless of
    > - * the generic counter period:
    > - */
    > - if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
    > - if ((s64)hwc->irq_period <= 0 || hwc->irq_period > 0x7FFFFFFF)
    > - hwc->irq_period = 0x7FFFFFFF;
    > + if ((s64)hwc->irq_period <= 0 || hwc->irq_period > x86_pmu.max_period)
    > + hwc->irq_period = x86_pmu.max_period;

    btw., should hwc->irq_period perhaps have an s64 type?

    Ingo


    \
     
     \ /
      Last update: 2009-04-29 13:17    [W:0.022 / U:32.396 seconds]
    ©2003-2016 Jasper Spaans. hosted at Digital OceanAdvertise on this site