Messages in this thread Patch in this message | | | Subject | Re: [git-pull -tip] x86:perf_counter cleanup | From | Peter Zijlstra <> | Date | Sun, 08 Mar 2009 11:32:39 +0100 |
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On Sun, 2009-03-08 at 15:43 +0530, Jaswinder Singh Rajput wrote: > > static struct pmc_x86_ops *pmc_amd_init(void) > { > - u64 old; > - int bits; > - > nr_counters_generic = 4; > nr_counters_fixed = 0; > counter_value_mask = 0x0000FFFFFFFFFFFFULL;
I would rather we try something like the below:
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c index f585371..ccb4f79 100644 --- a/arch/x86/kernel/cpu/perf_counter.c +++ b/arch/x86/kernel/cpu/perf_counter.c @@ -957,12 +957,39 @@ static struct pmc_x86_ops *pmc_amd_init(void) u64 old; int bits; + pr_info("AMD Performance Monitoring support detected.\n"); + nr_counters_generic = 4; nr_counters_fixed = 0; - counter_value_mask = 0x0000FFFFFFFFFFFFULL; - counter_value_bits = 48; + counter_value_mask = ~0ULL; - pr_info("AMD Performance Monitoring support detected.\n"); + rdmsrl(MSR_K7_PERFCTR0, old); + wrmsrl(MSR_K7_PERFCTR0, counter_value_mask); + + /* + * Ensure the counter_value_mask write, is completed before + * we try to read it back. + */ + mb(); + + /* read the truncated mask */ + rdmsrl(MSR_K7_PERFCTR0, counter_value_mask); + wrmsrl(MSR_K7_PERFCTR0, old); + + bits = 32 + fls(counter_value_mask >> 32); + if (bits == 32) + bits = fls((u32)counter_value_mask); + counter_value_bits = bits; + + if (counter_value_bits != 48 || + counter_value_mask != ((1ULL << counter_value_bits) - 1)) { + printk(KERN_ERR "Bad cpu! speculated through full memory barrier!\n"); + printk(KERN_ERR " ... old value: %llx\n", old); + printk(KERN_ERR " ... new value: %llx\n", counter_value_mask); + + counter_value_bits = 48; + counter_value_mask = 0x0000FFFFFFFFFFFFULL; + } return &pmc_amd_ops; }
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