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    SubjectRe: [PATCH] x86: don't compile vsmp_64 for 32bit
    Ravikiran G Thirumalai wrote:
    > On Sat, Feb 28, 2009 at 10:44:30AM +0100, Ingo Molnar wrote:
    >> * Ravikiran G Thirumalai <kiran@scalex86.org> wrote:
    >>
    >>> True, but by how much? 212 bytes, out of 7285943 bytes which
    >>> is very very small percentage wise.
    >> How does this eliminate the validity of the patch?
    >>
    >
    > It costs 212 bytes to leave is_vsmp_box() to not just be a dummy no-op.
    > Having is_vsmp_box() detect if the hardware is indeed vSMP, is meaningful even when
    > CONFIG_VSMP is not turned on. This is because is_vsmp_box() is used to
    > tell the kernel, that although the cpus being used are supposed to have TSCs
    > in sync, they are not really in sync. This is because
    > you cannot ensure TSCs won't drift between multiple boards being aggregated
    > on vSMP systems. Take the case of distro kernels. Distro kernels typically do
    > not have CONFIG_X86_VSMP on. Due to the large internode cacheline
    > setting, CONFIG_VSMP would not be on on the generic distro installer kernels.
    > If is_vsmp_box() is a no-op, the generic distro installer kernels will
    > assume TSCs to be synched, which is bad. Hence, it will be nice if, for
    > the cost of 212 bytes, vsmp64.o be compiled either unconditionally, OR
    > conditionally for 64bit architectures only. The question is, is 212 bytes out
    > of 7285943 bytes too expensive for the generic kernels? I hope not.

    we may need to revisit apic_is_clustered_box()

    /*
    * apic_is_clustered_box() -- Check if we can expect good TSC
    *
    * Thus far, the major user of this is IBM's Summit2 series:
    *
    * Clustered boxes may have unsynced TSC problems if they are
    * multi-chassis. Use available data to take a good guess.
    * If in doubt, go HPET.
    */
    __cpuinit int apic_is_clustered_box(void)

    ....

    /*
    * If clusters > 2, then should be multi-chassis.
    * May have to revisit this when multi-core + hyperthreaded CPUs come
    * out, but AFAIK this will work even for them.
    */


    with intel new cpus with 8 cores and HT enabled, even 2 sockets system will get 3 (?) so called "apic cluster"

    we really need to use dmi etc way to detect multi-chassis system from now on

    YH


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