Messages in this thread | | | Date | Fri, 13 Mar 2009 10:04:44 -0400 (EDT) | From | Alan Stern <> | Subject | Re: [patch 02/11] x86 architecture implementation of Hardware Breakpoint interfaces |
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On Fri, 13 Mar 2009, Ingo Molnar wrote:
> The core issue being discussed is the debug register allocation > and scheduling model though, and you have not directly commented > on that. > > My argument in a nutshell is that a bottom-up for user + > top-down for kernel use static allocator with no dynamic > scheduling will get us most of the benefits with a tenth of the > complexity.
Take this even farther: We shouldn't restrict userspace to bottom-up register allocation. With very little additional effort we can virtualize the debug registers; then userspace can allocate them in whatever order it wants and still end up using the physical registers in bottom-up order (or top-down, which is the order used by the current patches).
After all, there's nothing to prevent programs other than gdb from using ptrace, and there's no guarantee that gdb will continue to allocate registers in increasing order.
Alan Stern
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