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Subject[tip:perfcounters/core] perf_counter: add comment to barrier
Commit-ID:  1b1646b16f983a880163afb9efd296de01c7d854
Gitweb: http://git.kernel.org/tip/1b1646b16f983a880163afb9efd296de01c7d854
Author: Peter Zijlstra <a.p.zijlstra@chello.nl>
AuthorDate: Fri, 13 Mar 2009 12:21:30 +0100
Commit: Ingo Molnar <mingo@elte.hu>
CommitDate: Fri, 13 Mar 2009 13:59:08 +0100

perf_counter: add comment to barrier

We need to ensure the enabled=0 write happens before we
start disabling the actual counters, so that a pcm_amd_enable()
will not enable one underneath us.

I think the race is impossible anyway, we always balance the
ops within any one context and perform enable() with IRQs disabled.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <20090313112301.384074618@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>


---
arch/x86/kernel/cpu/perf_counter.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
index 1cedc34..a2e3b76 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -247,6 +247,10 @@ static u64 pmc_amd_save_disable_all(void)

enabled = cpuc->enabled;
cpuc->enabled = 0;
+ /*
+ * ensure we write the disable before we start disabling the
+ * counters proper, so that pcm_amd_enable() does the right thing.
+ */
barrier();

for (idx = 0; idx < nr_counters_generic; idx++) {

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