Messages in this thread Patch in this message | | | From | Andi Kleen <> | Subject | [PATCH] [3/9] x86: CMCI: Avoid potential reentry of threshold interrupt | Date | Thu, 12 Feb 2009 13:49:32 +0100 (CET) |
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Impact: minor bugfix
The threshold handler on AMD (and soon on Intel) could be theoretically reentered by the hardware. This could lead to corrupted events because the machine check poll code assumes it is not reentered.
Move the APIC ACK to the end of the interrupt handler to let the hardware avoid that.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
--- arch/x86/kernel/cpu/mcheck/threshold.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Index: linux/arch/x86/kernel/cpu/mcheck/threshold.c =================================================================== --- linux.orig/arch/x86/kernel/cpu/mcheck/threshold.c 2009-02-12 11:30:51.000000000 +0100 +++ linux/arch/x86/kernel/cpu/mcheck/threshold.c 2009-02-12 11:30:51.000000000 +0100 @@ -15,10 +15,11 @@ asmlinkage void mce_threshold_interrupt(void) { - ack_APIC_irq(); exit_idle(); irq_enter(); inc_irq_stat(irq_threshold_count); mce_threshold_vector(); irq_exit(); + /* Ack only at the end to avoid potential reentry */ + ack_APIC_irq(); }
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