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Subjectgpio gpio_to_irq
I have a few questions regarding the gpio related to interrupts.

The hardware is a generic gpio block that is located on pci. The pins
themselves can be configured to in/out and generate interrupts.

All in all it looks to be very similar to the langwell gpio.;a=blob;f=drivers/gpio/langwell_gpio.c;h=4baf3d7d0f8e6e4f1f7887625b7f73a62dba1a83;hb=22763c5cf3690a681551162c15d34d935308c8d7

Many gpio drivers use the set_irq_chained_handler() instead of calling
request_irq to get the main gpio interrupt. But doing so on a shared pci
interrupt do not look like a good idea.

Under what circumstance is set_irq_chained_handler allowed ?

The next thing is that the drivers then registers a "fake" interrupt
chip to make it possible for the gpio client to call request_irq with
the irq number returned from gpio_to_irq().

While using this interface is neat it do require that the gpio driver
somehow can just take over a few irq numbers from the system.

How is this supposed to be done?? the langwell driver reads a number
located at BAR1 and simply use that as the first irq number, hu?

others start to allocate from the top and so on. what is the correct way
to do this on a x86 with a gpio device on the pci bus ??

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