Messages in this thread | | | Date | Wed, 23 Dec 2009 12:41:50 -0500 | From | Mark Hounschell <> | Subject | Re: [Fdutils] DMA cache consistency bug introduced in 2.6.28 |
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On 12/23/2009 11:38 AM, Andi Kleen wrote: > Linus Torvalds <torvalds@linux-foundation.org> writes: > >> It's not using the lapic for CPU0. >> >> Using the HPET as a per-cpu timer is some crazy sh*t, since it's pretty >> expensive to reprogram (compared to the local apic). And having different >> timers for different CPU's is just odd. >> >> The fact that the timer subsystem can do this and it all (mostly) works at >> all is nice and impressive, but doesn't make it any less crazy ;) > > I suspect it's a system where the APIC timer stops in deeper idle > states and it supports them. In this case CPU #0 does timer broadcasts > when needed to wake the other CPUs up from deep C, but for that it has > to run with HPET. At least the other ones can still enjoy the LAPIC > timer. > > This might suggest that Mark's floppy controller doesn't like > deep C? Mark, did you try booting with processor.max_cstate=1 > and HPET enabled?
I just did and /proc/interrupts looks the same and the floppy still does not format.
I'll try the patch Linus provided now.
Mark
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