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SubjectRe: [PATCH 2/2] perf_events: add event constraints support for Intel processors

* David Miller <> wrote:

> From: stephane eranian <>
> Date: Wed, 7 Oct 2009 14:31:58 +0200
> > What PPC does is probably the only way to do this given the interface between
> > generic and machine-specific code. The one advantage I see is that it works
> > inside an event group but also across event groups because that code does not
> > look at group boundary, it only looks at the events and the number of available
> > registers. The downside is that you duplicate state.
> >
> > Did I get this right, Paul?
> That's basically how his code works, yes. I intend on duplicating it
> to some extent on sparc64 since I'm operating in a similar problem
> space.
> So if at least some of this engine went to a generic place, there'd be
> at least a 3rd user :-)

Yeah, i'd definitely suggest to generalize this. We've missed updating
PowerPC lowlevel details a couple of times in perf core updates, just
because it's in a non-obvious place. Even if it's used by just a single
arch, generic code is much more visible.

PowerPC really has this somewhat somewhat weird track record of
privatizing generic facilities and smugly keeping it to themselves as a
competitive advantage ;-) Reminds me of the old semaphore code which was
the best on PowerPC, for years. Lets not go there again :)


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