Messages in this thread | | | Date | Tue, 6 Oct 2009 09:19:10 -0600 (MDT) | From | Paul Walmsley <> | Subject | Re: [PATCH 2/8] omap: Lock DPLL5 at boot |
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On Fri, 2 Oct 2009, Tony Lindgren wrote:
> From: Rajendra Nayak <rnayak@ti.com> > > Lock DPLL5 at 120MHz at boot. The USBHOST 120MHz f-clock and > USBTLL f-clock are the only users of this DPLL, and 120MHz is > is the only recommended rate for these clocks. > > With this patch, the 60 MHz ULPI clock is generated correctly. > > Tested on an OMAP3430 SDP. > > Signed-off-by: Rajendra Nayak <rnayak@ti.com> > Signed-off-by: Anand Gadiyar <gadiyar@ti.com> > Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
- Paul
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