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    SubjectRe: staging/dream: add gpio and pmem support
    On Mon 2009-10-26 20:00:39, Greg KH wrote:
    > On Tue, Oct 27, 2009 at 01:17:03AM +0100, Pavel Machek wrote:
    > > Hi!
    > >
    > > > > This adds generic_gpio and pmem support, both are needed for other
    > > > > dream drivers.
    > > > >
    > > > > Signed-off-by: Pavel Machek <pavel@ucw.cz>
    > > >
    > > > I'd prefer to get the existing code building, before adding new stuff :(
    > >
    > > Well, unfortunately other pieces depend on these.
    >
    > The pieces already in the tree?

    Yes :-(.

    > Why are you sending me patches that do
    > not build?

    I did not realize how much was those drivers depenend on arch-specific part.

    > > I have it building with this patch (but note that it uses -I magic; I
    > > started to write script rewriting files so that -I is not neccessary,
    > > but I did not have time to finish it yet).
    >
    > Ok, should I just delete the whole drivers/staging/dream/ directory as
    > there seems no goal to get this to build properly? I've just marked the
    > code as BROKEN, any chance to get it building again soon?

    Could we perhaps use -I to let it build before I find time to do
    search&replace of 100 #includes? Yes, I'm working on that, but no, it
    obviously does not progress as fast as I expected...

    Pavel

    Add missing files/includes neccessary for Dream compilation.

    Signed-off-by: Pavel Machek <pavel@ucw.cz>


    --- a/drivers/staging/dream/Kconfig
    +++ b/drivers/staging/dream/Kconfig
    @@ -2,11 +2,46 @@ source "drivers/staging/dream/smd/Kconfig"

    source "drivers/staging/dream/camera/Kconfig"

    +config MSM_AMSS_VERSION
    + int
    + default 6210 if MSM_AMSS_VERSION_6210
    + default 6220 if MSM_AMSS_VERSION_6220
    + default 6225 if MSM_AMSS_VERSION_6225
    + default 6350 if MSM_AMSS_VERSION_6350
    +
    +choice
    + prompt "AMSS modem firmware version"
    +
    + default MSM_AMSS_VERSION_6225
    +
    + config MSM_AMSS_VERSION_6210
    + bool "6.2.10"
    +
    + config MSM_AMSS_VERSION_6220
    + bool "6.2.20"
    +
    + config MSM_AMSS_VERSION_6225
    + bool "6.2.20 + New ADSP"
    +
    + config MSM_AMSS_VERSION_6350
    + bool "6.3.50"
    +endchoice
    +
    +config MSM_ADSP
    + tristate "MSM ADSP driver"
    + default y
    + help
    + Provides access to registers needed by the userspace aDSP library.

    config INPUT_GPIO
    tristate "GPIO driver support"
    help
    Say Y here if you want to support gpio based keys, wheels etc...

    +config GENERIC_GPIO
    + bool
    + default y

    -
    +config ANDROID_PMEM
    + bool "Android pmem allocator"
    + default y
    diff --git a/drivers/staging/dream/Makefile b/drivers/staging/dream/Makefile
    index 2b79151..f1e0429 100644
    --- a/drivers/staging/dream/Makefile
    +++ b/drivers/staging/dream/Makefile
    @@ -1,4 +1,7 @@
    +EXTRA_CFLAGS=-Idrivers/staging/dream/include
    obj-$(CONFIG_MSM_ADSP) += qdsp5/ smd/
    obj-$(CONFIG_MSM_CAMERA) += camera/
    obj-$(CONFIG_INPUT_GPIO) += gpio_axis.o gpio_event.o gpio_input.o gpio_matrix.o gpio_output.o
    +obj-$(CONFIG_ANDROID_PMEM) += pmem.o
    +obj-y += generic_gpio.o

    diff --git a/drivers/staging/dream/camera/Kconfig b/drivers/staging/dream/camera/Kconfig
    index 0a3e903..bfb6d24 100644
    --- a/drivers/staging/dream/camera/Kconfig
    +++ b/drivers/staging/dream/camera/Kconfig
    @@ -15,7 +15,7 @@ config MSM_CAMERA_DEBUG

    config MSM_CAMERA_FLASH
    bool "Qualcomm MSM camera flash support"
    - depends on MSM_CAMERA
    + depends on MSM_CAMERA && BROKEN
    ---help---
    Enable support for LED flash for msm camera

    diff --git a/drivers/staging/dream/camera/Makefile b/drivers/staging/dream/camera/Makefile
    index 4429ae5..db228d7 100644
    --- a/drivers/staging/dream/camera/Makefile
    +++ b/drivers/staging/dream/camera/Makefile
    @@ -1,3 +1,4 @@
    +EXTRA_CFLAGS=-Idrivers/staging/dream/include
    obj-$(CONFIG_MT9T013) += mt9t013.o mt9t013_reg.o
    obj-$(CONFIG_MT9D112) += mt9d112.o mt9d112_reg.o
    obj-$(CONFIG_MT9P012) += mt9p012_fox.o mt9p012_reg.o
    diff --git a/drivers/staging/dream/include/linux/android_pmem.h b/drivers/staging/dream/include/linux/android_pmem.h
    new file mode 100644
    index 0000000..393d26c
    --- /dev/null
    +++ b/drivers/staging/dream/include/linux/android_pmem.h
    @@ -0,0 +1,80 @@
    +/* drivers/staging/dream/include/linux/android_pmem.h
    + *
    + * Copyright (C) 2007 Google, Inc.
    + *
    + * This software is licensed under the terms of the GNU General Public
    + * License version 2, as published by the Free Software Foundation, and
    + * may be copied, distributed, and modified under those terms.
    + *
    + * This program is distributed in the hope that it will be useful,
    + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    + * GNU General Public License for more details.
    + *
    + */
    +
    +#ifndef _ANDROID_PMEM_H_
    +#define _ANDROID_PMEM_H_
    +
    +#define PMEM_IOCTL_MAGIC 'p'
    +#define PMEM_GET_PHYS _IOW(PMEM_IOCTL_MAGIC, 1, unsigned int)
    +#define PMEM_MAP _IOW(PMEM_IOCTL_MAGIC, 2, unsigned int)
    +#define PMEM_GET_SIZE _IOW(PMEM_IOCTL_MAGIC, 3, unsigned int)
    +#define PMEM_UNMAP _IOW(PMEM_IOCTL_MAGIC, 4, unsigned int)
    +/* This ioctl will allocate pmem space, backing the file, it will fail
    + * if the file already has an allocation, pass it the len as the argument
    + * to the ioctl */
    +#define PMEM_ALLOCATE _IOW(PMEM_IOCTL_MAGIC, 5, unsigned int)
    +/* This will connect a one pmem file to another, pass the file that is already
    + * backed in memory as the argument to the ioctl
    + */
    +#define PMEM_CONNECT _IOW(PMEM_IOCTL_MAGIC, 6, unsigned int)
    +/* Returns the total size of the pmem region it is sent to as a pmem_region
    + * struct (with offset set to 0).
    + */
    +#define PMEM_GET_TOTAL_SIZE _IOW(PMEM_IOCTL_MAGIC, 7, unsigned int)
    +/* Revokes gpu registers and resets the gpu. Pass a pointer to the
    + * start of the mapped gpu regs (the vaddr returned by mmap) as the argument.
    + */
    +#define HW3D_REVOKE_GPU _IOW(PMEM_IOCTL_MAGIC, 8, unsigned int)
    +#define HW3D_GRANT_GPU _IOW(PMEM_IOCTL_MAGIC, 9, unsigned int)
    +#define HW3D_WAIT_FOR_INTERRUPT _IOW(PMEM_IOCTL_MAGIC, 10, unsigned int)
    +
    +int get_pmem_file(int fd, unsigned long *start, unsigned long *vstart,
    + unsigned long *end, struct file **filp);
    +int get_pmem_user_addr(struct file *file, unsigned long *start,
    + unsigned long *end);
    +void put_pmem_file(struct file* file);
    +void flush_pmem_file(struct file *file, unsigned long start, unsigned long len);
    +
    +struct android_pmem_platform_data
    +{
    + const char* name;
    + /* starting physical address of memory region */
    + unsigned long start;
    + /* size of memory region */
    + unsigned long size;
    + /* set to indicate the region should not be managed with an allocator */
    + unsigned no_allocator;
    + /* set to indicate maps of this region should be cached, if a mix of
    + * cached and uncached is desired, set this and open the device with
    + * O_SYNC to get an uncached region */
    + unsigned cached;
    + /* The MSM7k has bits to enable a write buffer in the bus controller*/
    + unsigned buffered;
    +};
    +
    +struct pmem_region {
    + unsigned long offset;
    + unsigned long len;
    +};
    +
    +int pmem_setup(struct android_pmem_platform_data *pdata,
    + long (*ioctl)(struct file *, unsigned int, unsigned long),
    + int (*release)(struct inode *, struct file *));
    +
    +int pmem_remap(struct pmem_region *region, struct file *file,
    + unsigned operation);
    +
    +#endif //_ANDROID_PPP_H_
    +
    diff --git a/drivers/staging/dream/include/linux/gpio_event.h b/drivers/staging/dream/include/linux/gpio_event.h
    new file mode 100644
    index 0000000..ffc5da3
    --- /dev/null
    +++ b/drivers/staging/dream/include/linux/gpio_event.h
    @@ -0,0 +1,154 @@
    +/* drivers/staging/dream/include/linux/gpio_event.h
    + *
    + * Copyright (C) 2007 Google, Inc.
    + *
    + * This software is licensed under the terms of the GNU General Public
    + * License version 2, as published by the Free Software Foundation, and
    + * may be copied, distributed, and modified under those terms.
    + *
    + * This program is distributed in the hope that it will be useful,
    + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    + * GNU General Public License for more details.
    + *
    + */
    +
    +#ifndef _LINUX_GPIO_EVENT_H
    +#define _LINUX_GPIO_EVENT_H
    +
    +#include <linux/input.h>
    +
    +enum {
    + GPIO_EVENT_FUNC_UNINIT = 0x0,
    + GPIO_EVENT_FUNC_INIT = 0x1,
    + GPIO_EVENT_FUNC_SUSPEND = 0x2,
    + GPIO_EVENT_FUNC_RESUME = 0x3,
    +};
    +struct gpio_event_info {
    + int (*func)(struct input_dev *input_dev,
    + struct gpio_event_info *info,
    + void **data, int func);
    + int (*event)(struct input_dev *input_dev,
    + struct gpio_event_info *info,
    + void **data, unsigned int type,
    + unsigned int code, int value); /* out events */
    +};
    +
    +struct gpio_event_platform_data {
    + const char *name;
    + struct gpio_event_info **info;
    + size_t info_count;
    + int (*power)(const struct gpio_event_platform_data *pdata, bool on);
    +};
    +
    +#define GPIO_EVENT_DEV_NAME "gpio-event"
    +
    +/* Key matrix */
    +
    +enum gpio_event_matrix_flags {
    + /* unset: drive active output low, set: drive active output high */
    + GPIOKPF_ACTIVE_HIGH = 1U << 0,
    + GPIOKPF_DEBOUNCE = 1U << 1,
    + GPIOKPF_REMOVE_SOME_PHANTOM_KEYS = 1U << 2,
    + GPIOKPF_REMOVE_PHANTOM_KEYS = GPIOKPF_REMOVE_SOME_PHANTOM_KEYS |
    + GPIOKPF_DEBOUNCE,
    + GPIOKPF_DRIVE_INACTIVE = 1U << 3,
    + GPIOKPF_LEVEL_TRIGGERED_IRQ = 1U << 4,
    + GPIOKPF_PRINT_UNMAPPED_KEYS = 1U << 16,
    + GPIOKPF_PRINT_MAPPED_KEYS = 1U << 17,
    + GPIOKPF_PRINT_PHANTOM_KEYS = 1U << 18,
    +};
    +
    +extern int gpio_event_matrix_func(struct input_dev *input_dev,
    + struct gpio_event_info *info, void **data, int func);
    +struct gpio_event_matrix_info {
    + /* initialize to gpio_event_matrix_func */
    + struct gpio_event_info info;
    + /* size must be ninputs * noutputs */
    + const unsigned short *keymap;
    + unsigned int *input_gpios;
    + unsigned int *output_gpios;
    + unsigned int ninputs;
    + unsigned int noutputs;
    + /* time to wait before reading inputs after driving each output */
    + ktime_t settle_time;
    + /* time to wait before scanning the keypad a second time */
    + ktime_t debounce_delay;
    + ktime_t poll_time;
    + unsigned flags;
    +};
    +
    +/* Directly connected inputs and outputs */
    +
    +enum gpio_event_direct_flags {
    + GPIOEDF_ACTIVE_HIGH = 1U << 0,
    +/* GPIOEDF_USE_DOWN_IRQ = 1U << 1, */
    +/* GPIOEDF_USE_IRQ = (1U << 2) | GPIOIDF_USE_DOWN_IRQ, */
    + GPIOEDF_PRINT_KEYS = 1U << 8,
    + GPIOEDF_PRINT_KEY_DEBOUNCE = 1U << 9,
    +};
    +
    +struct gpio_event_direct_entry {
    + uint32_t gpio:23;
    + uint32_t code:9;
    +};
    +
    +/* inputs */
    +extern int gpio_event_input_func(struct input_dev *input_dev,
    + struct gpio_event_info *info, void **data, int func);
    +struct gpio_event_input_info {
    + /* initialize to gpio_event_input_func */
    + struct gpio_event_info info;
    + ktime_t debounce_time;
    + ktime_t poll_time;
    + uint16_t flags;
    + uint16_t type;
    + const struct gpio_event_direct_entry *keymap;
    + size_t keymap_size;
    +};
    +
    +/* outputs */
    +extern int gpio_event_output_func(struct input_dev *input_dev,
    + struct gpio_event_info *info, void **data, int func);
    +extern int gpio_event_output_event(struct input_dev *input_dev,
    + struct gpio_event_info *info, void **data,
    + unsigned int type, unsigned int code, int value);
    +struct gpio_event_output_info {
    + /* initialize to gpio_event_output_func and gpio_event_output_event */
    + struct gpio_event_info info;
    + uint16_t flags;
    + uint16_t type;
    + const struct gpio_event_direct_entry *keymap;
    + size_t keymap_size;
    +};
    +
    +
    +/* axes */
    +
    +enum gpio_event_axis_flags {
    + GPIOEAF_PRINT_UNKNOWN_DIRECTION = 1U << 16,
    + GPIOEAF_PRINT_RAW = 1U << 17,
    + GPIOEAF_PRINT_EVENT = 1U << 18,
    +};
    +
    +extern int gpio_event_axis_func(struct input_dev *input_dev,
    + struct gpio_event_info *info, void **data, int func);
    +struct gpio_event_axis_info {
    + /* initialize to gpio_event_axis_func */
    + struct gpio_event_info info;
    + uint8_t count;
    + uint8_t type; /* EV_REL or EV_ABS */
    + uint16_t code;
    + uint16_t decoded_size;
    + uint16_t (*map)(struct gpio_event_axis_info *info, uint16_t in);
    + uint32_t *gpio;
    + uint32_t flags;
    +};
    +#define gpio_axis_2bit_gray_map gpio_axis_4bit_gray_map
    +#define gpio_axis_3bit_gray_map gpio_axis_4bit_gray_map
    +uint16_t gpio_axis_4bit_gray_map(
    + struct gpio_event_axis_info *info, uint16_t in);
    +uint16_t gpio_axis_5bit_singletrack_map(
    + struct gpio_event_axis_info *info, uint16_t in);
    +
    +#endif
    diff --git a/drivers/staging/dream/include/linux/msm_adsp.h b/drivers/staging/dream/include/linux/msm_adsp.h
    new file mode 100644
    index 0000000..e775f3e
    --- /dev/null
    +++ b/drivers/staging/dream/include/linux/msm_adsp.h
    @@ -0,0 +1,84 @@
    +/* drivers/staging/dream/include/linux/msm_adsp.h
    + *
    + * Copyright (c) QUALCOMM Incorporated
    + * Copyright (C) 2007 Google, Inc.
    + * Author: Iliyan Malchev <ibm@android.com>
    + *
    + * This software is licensed under the terms of the GNU General Public
    + * License version 2, as published by the Free Software Foundation, and
    + * may be copied, distributed, and modified under those terms.
    + *
    + * This program is distributed in the hope that it will be useful,
    + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    + * GNU General Public License for more details.
    + *
    + */
    +#ifndef __LINUX_MSM_ADSP_H
    +#define __LINUX_MSM_ADSP_H
    +
    +#include <linux/types.h>
    +#include <linux/ioctl.h>
    +
    +#define ADSP_IOCTL_MAGIC 'q'
    +
    +/* ADSP_IOCTL_WRITE_COMMAND */
    +struct adsp_command_t {
    + uint16_t queue;
    + uint32_t len; /* bytes */
    + uint8_t *data;
    +};
    +
    +/* ADSP_IOCTL_GET_EVENT */
    +struct adsp_event_t {
    + uint16_t type; /* 1 == event (RPC), 0 == message (adsp) */
    + uint32_t timeout_ms; /* -1 for infinite, 0 for immediate return */
    + uint16_t msg_id;
    + uint16_t flags; /* 1 == 16--bit event, 0 == 32-bit event */
    + uint32_t len; /* size in, number of bytes out */
    + uint8_t *data;
    +};
    +
    +#define ADSP_IOCTL_ENABLE \
    + _IOR(ADSP_IOCTL_MAGIC, 1, unsigned)
    +
    +#define ADSP_IOCTL_DISABLE \
    + _IOR(ADSP_IOCTL_MAGIC, 2, unsigned)
    +
    +#define ADSP_IOCTL_DISABLE_ACK \
    + _IOR(ADSP_IOCTL_MAGIC, 3, unsigned)
    +
    +#define ADSP_IOCTL_WRITE_COMMAND \
    + _IOR(ADSP_IOCTL_MAGIC, 4, struct adsp_command_t *)
    +
    +#define ADSP_IOCTL_GET_EVENT \
    + _IOWR(ADSP_IOCTL_MAGIC, 5, struct adsp_event_data_t *)
    +
    +#define ADSP_IOCTL_SET_CLKRATE \
    + _IOR(ADSP_IOCTL_MAGIC, 6, unsigned)
    +
    +#define ADSP_IOCTL_DISABLE_EVENT_RSP \
    + _IOR(ADSP_IOCTL_MAGIC, 10, unsigned)
    +
    +struct adsp_pmem_info {
    + int fd;
    + void *vaddr;
    +};
    +
    +#define ADSP_IOCTL_REGISTER_PMEM \
    + _IOW(ADSP_IOCTL_MAGIC, 13, unsigned)
    +
    +#define ADSP_IOCTL_UNREGISTER_PMEM \
    + _IOW(ADSP_IOCTL_MAGIC, 14, unsigned)
    +
    +/* Cause any further GET_EVENT ioctls to fail (-ENODEV)
    + * until the device is closed and reopened. Useful for
    + * terminating event dispatch threads
    + */
    +#define ADSP_IOCTL_ABORT_EVENT_READ \
    + _IOW(ADSP_IOCTL_MAGIC, 15, unsigned)
    +
    +#define ADSP_IOCTL_LINK_TASK \
    + _IOW(ADSP_IOCTL_MAGIC, 16, unsigned)
    +
    +#endif
    diff --git a/drivers/staging/dream/include/linux/msm_audio.h b/drivers/staging/dream/include/linux/msm_audio.h
    new file mode 100644
    index 0000000..cfbdaa0
    --- /dev/null
    +++ b/drivers/staging/dream/include/linux/msm_audio.h
    @@ -0,0 +1,115 @@
    +/* drivers/staging/dream/include/linux/msm_audio.h
    + *
    + * Copyright (C) 2008 Google, Inc.
    + *
    + * This software is licensed under the terms of the GNU General Public
    + * License version 2, as published by the Free Software Foundation, and
    + * may be copied, distributed, and modified under those terms.
    + *
    + * This program is distributed in the hope that it will be useful,
    + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    + * GNU General Public License for more details.
    + *
    + */
    +
    +#ifndef __LINUX_MSM_AUDIO_H
    +#define __LINUX_MSM_AUDIO_H
    +
    +#include <linux/types.h>
    +#include <linux/ioctl.h>
    +#include <asm/sizes.h>
    +
    +/* PCM Audio */
    +
    +#define AUDIO_IOCTL_MAGIC 'a'
    +
    +#define AUDIO_START _IOW(AUDIO_IOCTL_MAGIC, 0, unsigned)
    +#define AUDIO_STOP _IOW(AUDIO_IOCTL_MAGIC, 1, unsigned)
    +#define AUDIO_FLUSH _IOW(AUDIO_IOCTL_MAGIC, 2, unsigned)
    +#define AUDIO_GET_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 3, unsigned)
    +#define AUDIO_SET_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 4, unsigned)
    +#define AUDIO_GET_STATS _IOR(AUDIO_IOCTL_MAGIC, 5, unsigned)
    +#define AUDIO_ENABLE_AUDPP _IOW(AUDIO_IOCTL_MAGIC, 6, unsigned)
    +#define AUDIO_SET_ADRC _IOW(AUDIO_IOCTL_MAGIC, 7, unsigned)
    +#define AUDIO_SET_EQ _IOW(AUDIO_IOCTL_MAGIC, 8, unsigned)
    +#define AUDIO_SET_RX_IIR _IOW(AUDIO_IOCTL_MAGIC, 9, unsigned)
    +#define AUDIO_SET_VOLUME _IOW(AUDIO_IOCTL_MAGIC, 10, unsigned)
    +#define AUDIO_ENABLE_AUDPRE _IOW(AUDIO_IOCTL_MAGIC, 11, unsigned)
    +#define AUDIO_SET_AGC _IOW(AUDIO_IOCTL_MAGIC, 12, unsigned)
    +#define AUDIO_SET_NS _IOW(AUDIO_IOCTL_MAGIC, 13, unsigned)
    +#define AUDIO_SET_TX_IIR _IOW(AUDIO_IOCTL_MAGIC, 14, unsigned)
    +#define AUDIO_PAUSE _IOW(AUDIO_IOCTL_MAGIC, 15, unsigned)
    +#define AUDIO_GET_PCM_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 30, unsigned)
    +#define AUDIO_SET_PCM_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 31, unsigned)
    +#define AUDIO_SWITCH_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 32, unsigned)
    +
    +#define AUDIO_MAX_COMMON_IOCTL_NUM 100
    +
    +#define AUDIO_MAX_COMMON_IOCTL_NUM 100
    +
    +struct msm_audio_config {
    + uint32_t buffer_size;
    + uint32_t buffer_count;
    + uint32_t channel_count;
    + uint32_t sample_rate;
    + uint32_t type;
    + uint32_t unused[3];
    +};
    +
    +struct msm_audio_stats {
    + uint32_t byte_count;
    + uint32_t sample_count;
    + uint32_t unused[2];
    +};
    +
    +/* Audio routing */
    +
    +#define SND_IOCTL_MAGIC 's'
    +
    +#define SND_MUTE_UNMUTED 0
    +#define SND_MUTE_MUTED 1
    +
    +struct msm_snd_device_config {
    + uint32_t device;
    + uint32_t ear_mute;
    + uint32_t mic_mute;
    +};
    +
    +#define SND_SET_DEVICE _IOW(SND_IOCTL_MAGIC, 2, struct msm_device_config *)
    +
    +#define SND_METHOD_VOICE 0
    +
    +struct msm_snd_volume_config {
    + uint32_t device;
    + uint32_t method;
    + uint32_t volume;
    +};
    +
    +#define SND_SET_VOLUME _IOW(SND_IOCTL_MAGIC, 3, struct msm_snd_volume_config *)
    +
    +/* Returns the number of SND endpoints supported. */
    +
    +#define SND_GET_NUM_ENDPOINTS _IOR(SND_IOCTL_MAGIC, 4, unsigned *)
    +
    +struct msm_snd_endpoint {
    + int id; /* input and output */
    + char name[64]; /* output only */
    +};
    +
    +/* Takes an index between 0 and one less than the number returned by
    + * SND_GET_NUM_ENDPOINTS, and returns the SND index and name of a
    + * SND endpoint. On input, the .id field contains the number of the
    + * endpoint, and on exit it contains the SND index, while .name contains
    + * the description of the endpoint.
    + */
    +
    +#define SND_GET_ENDPOINT _IOWR(SND_IOCTL_MAGIC, 5, struct msm_snd_endpoint *)
    +
    +struct msm_audio_pcm_config {
    + uint32_t pcm_feedback; /* 0 - disable > 0 - enable */
    + uint32_t buffer_count; /* Number of buffers to allocate */
    + uint32_t buffer_size; /* Size of buffer for capturing of
    + PCM samples */
    +};
    +#endif
    diff --git a/drivers/staging/dream/include/linux/msm_rpcrouter.h b/drivers/staging/dream/include/linux/msm_rpcrouter.h
    new file mode 100644
    index 0000000..64845fb
    --- /dev/null
    +++ b/drivers/staging/dream/include/linux/msm_rpcrouter.h
    @@ -0,0 +1,47 @@
    +/* drivers/staging/dream/include/linux/msm_rpcrouter.h
    + *
    + * Copyright (c) QUALCOMM Incorporated
    + * Copyright (C) 2007 Google, Inc.
    + * Author: San Mehat <san@android.com>
    + *
    + * This software is licensed under the terms of the GNU General Public
    + * License version 2, as published by the Free Software Foundation, and
    + * may be copied, distributed, and modified under those terms.
    + *
    + * This program is distributed in the hope that it will be useful,
    + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    + * GNU General Public License for more details.
    + *
    + */
    +#ifndef __LINUX_MSM_RPCROUTER_H
    +#define __LINUX_MSM_RPCROUTER_H
    +
    +#include <linux/types.h>
    +#include <linux/ioctl.h>
    +
    +#define RPC_ROUTER_VERSION_V1 0x00010000
    +
    +struct rpcrouter_ioctl_server_args {
    + uint32_t prog;
    + uint32_t vers;
    +};
    +
    +#define RPC_ROUTER_IOCTL_MAGIC (0xC1)
    +
    +#define RPC_ROUTER_IOCTL_GET_VERSION \
    + _IOR(RPC_ROUTER_IOCTL_MAGIC, 0, unsigned int)
    +
    +#define RPC_ROUTER_IOCTL_GET_MTU \
    + _IOR(RPC_ROUTER_IOCTL_MAGIC, 1, unsigned int)
    +
    +#define RPC_ROUTER_IOCTL_REGISTER_SERVER \
    + _IOWR(RPC_ROUTER_IOCTL_MAGIC, 2, unsigned int)
    +
    +#define RPC_ROUTER_IOCTL_UNREGISTER_SERVER \
    + _IOWR(RPC_ROUTER_IOCTL_MAGIC, 3, unsigned int)
    +
    +#define RPC_ROUTER_IOCTL_GET_MINOR_VERSION \
    + _IOW(RPC_ROUTER_IOCTL_MAGIC, 4, unsigned int)
    +
    +#endif
    diff --git a/drivers/staging/dream/include/linux/wakelock.h b/drivers/staging/dream/include/linux/wakelock.h
    new file mode 100644
    index 0000000..93c31a4
    --- /dev/null
    +++ b/drivers/staging/dream/include/linux/wakelock.h
    @@ -0,0 +1,91 @@
    +/* drivers/staging/dream/include/linux/wakelock.h
    + *
    + * Copyright (C) 2007-2008 Google, Inc.
    + *
    + * This software is licensed under the terms of the GNU General Public
    + * License version 2, as published by the Free Software Foundation, and
    + * may be copied, distributed, and modified under those terms.
    + *
    + * This program is distributed in the hope that it will be useful,
    + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    + * GNU General Public License for more details.
    + *
    + */
    +
    +#ifndef _LINUX_WAKELOCK_H
    +#define _LINUX_WAKELOCK_H
    +
    +#include <linux/list.h>
    +#include <linux/ktime.h>
    +
    +/* A wake_lock prevents the system from entering suspend or other low power
    + * states when active. If the type is set to WAKE_LOCK_SUSPEND, the wake_lock
    + * prevents a full system suspend. If the type is WAKE_LOCK_IDLE, low power
    + * states that cause large interrupt latencies or that disable a set of
    + * interrupts will not entered from idle until the wake_locks are released.
    + */
    +
    +enum {
    + WAKE_LOCK_SUSPEND, /* Prevent suspend */
    + WAKE_LOCK_IDLE, /* Prevent low power idle */
    + WAKE_LOCK_TYPE_COUNT
    +};
    +
    +struct wake_lock {
    +#ifdef CONFIG_HAS_WAKELOCK
    + struct list_head link;
    + int flags;
    + const char *name;
    + unsigned long expires;
    +#ifdef CONFIG_WAKELOCK_STAT
    + struct {
    + int count;
    + int expire_count;
    + int wakeup_count;
    + ktime_t total_time;
    + ktime_t prevent_suspend_time;
    + ktime_t max_time;
    + ktime_t last_time;
    + } stat;
    +#endif
    +#endif
    +};
    +
    +#ifdef CONFIG_HAS_WAKELOCK
    +
    +void wake_lock_init(struct wake_lock *lock, int type, const char *name);
    +void wake_lock_destroy(struct wake_lock *lock);
    +void wake_lock(struct wake_lock *lock);
    +void wake_lock_timeout(struct wake_lock *lock, long timeout);
    +void wake_unlock(struct wake_lock *lock);
    +
    +/* wake_lock_active returns a non-zero value if the wake_lock is currently
    + * locked. If the wake_lock has a timeout, it does not check the timeout
    + * but if the timeout had aready been checked it will return 0.
    + */
    +int wake_lock_active(struct wake_lock *lock);
    +
    +/* has_wake_lock returns 0 if no wake locks of the specified type are active,
    + * and non-zero if one or more wake locks are held. Specifically it returns
    + * -1 if one or more wake locks with no timeout are active or the
    + * number of jiffies until all active wake locks time out.
    + */
    +long has_wake_lock(int type);
    +
    +#else
    +
    +static inline void wake_lock_init(struct wake_lock *lock, int type,
    + const char *name) {}
    +static inline void wake_lock_destroy(struct wake_lock *lock) {}
    +static inline void wake_lock(struct wake_lock *lock) {}
    +static inline void wake_lock_timeout(struct wake_lock *lock, long timeout) {}
    +static inline void wake_unlock(struct wake_lock *lock) {}
    +
    +static inline int wake_lock_active(struct wake_lock *lock) { return 0; }
    +static inline long has_wake_lock(int type) { return 0; }
    +
    +#endif
    +
    +#endif
    +
    diff --git a/drivers/staging/dream/include/mach/camera.h b/drivers/staging/dream/include/mach/camera.h
    new file mode 100644
    index 0000000..c20f042
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/camera.h
    @@ -0,0 +1,279 @@
    +/*
    + * Copyright (C) 2008-2009 QUALCOMM Incorporated.
    + */
    +
    +#ifndef __ASM__ARCH_CAMERA_H
    +#define __ASM__ARCH_CAMERA_H
    +
    +#include <linux/list.h>
    +#include <linux/poll.h>
    +#include <linux/cdev.h>
    +#include <linux/platform_device.h>
    +#include "linux/types.h"
    +
    +#include <mach/board.h>
    +#include <media/msm_camera.h>
    +
    +#ifdef CONFIG_MSM_CAMERA_DEBUG
    +#define CDBG(fmt, args...) printk(KERN_INFO "msm_camera: " fmt, ##args)
    +#else
    +#define CDBG(fmt, args...) do { } while (0)
    +#endif
    +
    +#define MSM_CAMERA_MSG 0
    +#define MSM_CAMERA_EVT 1
    +#define NUM_WB_EXP_NEUTRAL_REGION_LINES 4
    +#define NUM_WB_EXP_STAT_OUTPUT_BUFFERS 3
    +#define NUM_AUTOFOCUS_MULTI_WINDOW_GRIDS 16
    +#define NUM_AF_STAT_OUTPUT_BUFFERS 3
    +
    +enum msm_queue {
    + MSM_CAM_Q_CTRL, /* control command or control command status */
    + MSM_CAM_Q_VFE_EVT, /* adsp event */
    + MSM_CAM_Q_VFE_MSG, /* adsp message */
    + MSM_CAM_Q_V4L2_REQ, /* v4l2 request */
    +};
    +
    +enum vfe_resp_msg {
    + VFE_EVENT,
    + VFE_MSG_GENERAL,
    + VFE_MSG_SNAPSHOT,
    + VFE_MSG_OUTPUT1,
    + VFE_MSG_OUTPUT2,
    + VFE_MSG_STATS_AF,
    + VFE_MSG_STATS_WE,
    +};
    +
    +struct msm_vfe_phy_info {
    + uint32_t sbuf_phy;
    + uint32_t y_phy;
    + uint32_t cbcr_phy;
    +};
    +
    +struct msm_vfe_resp {
    + enum vfe_resp_msg type;
    + struct msm_vfe_evt_msg evt_msg;
    + struct msm_vfe_phy_info phy;
    + void *extdata;
    + int32_t extlen;
    +};
    +
    +struct msm_vfe_callback {
    + void (*vfe_resp)(struct msm_vfe_resp *,
    + enum msm_queue, void *syncdata);
    + void* (*vfe_alloc)(int, void *syncdata);
    +};
    +
    +struct msm_camvfe_fn {
    + int (*vfe_init)(struct msm_vfe_callback *, struct platform_device *);
    + int (*vfe_enable)(struct camera_enable_cmd *);
    + int (*vfe_config)(struct msm_vfe_cfg_cmd *, void *);
    + int (*vfe_disable)(struct camera_enable_cmd *,
    + struct platform_device *dev);
    + void (*vfe_release)(struct platform_device *);
    +};
    +
    +struct msm_sensor_ctrl {
    + int (*s_init)(const struct msm_camera_sensor_info *);
    + int (*s_release)(void);
    + int (*s_config)(void __user *);
    +};
    +
    +struct msm_sync {
    + /* These two queues are accessed from a process context only. */
    + struct hlist_head frame; /* most-frequently accessed */
    + struct hlist_head stats;
    +
    + /* The message queue is used by the control thread to send commands
    + * to the config thread, and also by the DSP to send messages to the
    + * config thread. Thus it is the only queue that is accessed from
    + * both interrupt and process context.
    + */
    + spinlock_t msg_event_q_lock;
    + struct list_head msg_event_q;
    + wait_queue_head_t msg_event_wait;
    +
    + /* This queue contains preview frames. It is accessed by the DSP (in
    + * in interrupt context, and by the frame thread.
    + */
    + spinlock_t prev_frame_q_lock;
    + struct list_head prev_frame_q;
    + wait_queue_head_t prev_frame_wait;
    + int unblock_poll_frame;
    +
    + /* This queue contains snapshot frames. It is accessed by the DSP (in
    + * interrupt context, and by the control thread.
    + */
    + spinlock_t pict_frame_q_lock;
    + struct list_head pict_frame_q;
    + wait_queue_head_t pict_frame_wait;
    +
    + struct msm_camera_sensor_info *sdata;
    + struct msm_camvfe_fn vfefn;
    + struct msm_sensor_ctrl sctrl;
    + struct platform_device *pdev;
    + uint8_t opencnt;
    + void *cropinfo;
    + int croplen;
    + unsigned pict_pp;
    +
    + const char *apps_id;
    +
    + struct mutex lock;
    + struct list_head list;
    +};
    +
    +#define MSM_APPS_ID_V4L2 "msm_v4l2"
    +#define MSM_APPS_ID_PROP "msm_qct"
    +
    +struct msm_device {
    + struct msm_sync *sync; /* most-frequently accessed */
    + struct device *device;
    + struct cdev cdev;
    + /* opened is meaningful only for the config and frame nodes,
    + * which may be opened only once.
    + */
    + atomic_t opened;
    +};
    +
    +struct msm_control_device_queue {
    + spinlock_t ctrl_status_q_lock;
    + struct list_head ctrl_status_q;
    + wait_queue_head_t ctrl_status_wait;
    +};
    +
    +struct msm_control_device {
    + struct msm_device *pmsm;
    +
    + /* This queue used by the config thread to send responses back to the
    + * control thread. It is accessed only from a process context.
    + */
    + struct msm_control_device_queue ctrl_q;
    +};
    +
    +/* this structure is used in kernel */
    +struct msm_queue_cmd {
    + struct list_head list;
    + enum msm_queue type;
    + void *command;
    +};
    +
    +struct register_address_value_pair {
    + uint16_t register_address;
    + uint16_t register_value;
    +};
    +
    +struct msm_pmem_region {
    + struct hlist_node list;
    + int type;
    + void *vaddr;
    + unsigned long paddr;
    + unsigned long len;
    + struct file *file;
    + uint32_t y_off;
    + uint32_t cbcr_off;
    + int fd;
    + uint8_t active;
    +};
    +
    +struct axidata {
    + uint32_t bufnum1;
    + uint32_t bufnum2;
    + struct msm_pmem_region *region;
    +};
    +
    +#ifdef CONFIG_MSM_CAMERA_FLASH
    +int msm_camera_flash_set_led_state(unsigned led_state);
    +#else
    +static inline int msm_camera_flash_set_led_state(unsigned led_state)
    +{
    + return -ENOTSUPP;
    +}
    +#endif
    +
    +/* Below functions are added for V4L2 kernel APIs */
    +struct msm_v4l2_driver {
    + struct msm_sync *sync;
    + int (*open)(struct msm_sync *, const char *apps_id);
    + int (*release)(struct msm_sync *);
    + int (*ctrl)(struct msm_sync *, struct msm_ctrl_cmd *);
    + int (*reg_pmem)(struct msm_sync *, struct msm_pmem_info *);
    + int (*get_frame) (struct msm_sync *, struct msm_frame *);
    + int (*put_frame) (struct msm_sync *, struct msm_frame *);
    + int (*get_pict) (struct msm_sync *, struct msm_ctrl_cmd *);
    + unsigned int (*drv_poll) (struct msm_sync *, struct file *,
    + struct poll_table_struct *);
    +};
    +
    +int msm_v4l2_register(struct msm_v4l2_driver *);
    +int msm_v4l2_unregister(struct msm_v4l2_driver *);
    +
    +void msm_camvfe_init(void);
    +int msm_camvfe_check(void *);
    +void msm_camvfe_fn_init(struct msm_camvfe_fn *, void *);
    +int msm_camera_drv_start(struct platform_device *dev,
    + int (*sensor_probe)(const struct msm_camera_sensor_info *,
    + struct msm_sensor_ctrl *));
    +
    +enum msm_camio_clk_type {
    + CAMIO_VFE_MDC_CLK,
    + CAMIO_MDC_CLK,
    + CAMIO_VFE_CLK,
    + CAMIO_VFE_AXI_CLK,
    +
    + CAMIO_MAX_CLK
    +};
    +
    +enum msm_camio_clk_src_type {
    + MSM_CAMIO_CLK_SRC_INTERNAL,
    + MSM_CAMIO_CLK_SRC_EXTERNAL,
    + MSM_CAMIO_CLK_SRC_MAX
    +};
    +
    +enum msm_s_test_mode {
    + S_TEST_OFF,
    + S_TEST_1,
    + S_TEST_2,
    + S_TEST_3
    +};
    +
    +enum msm_s_resolution {
    + S_QTR_SIZE,
    + S_FULL_SIZE,
    + S_INVALID_SIZE
    +};
    +
    +enum msm_s_reg_update {
    + /* Sensor egisters that need to be updated during initialization */
    + S_REG_INIT,
    + /* Sensor egisters that needs periodic I2C writes */
    + S_UPDATE_PERIODIC,
    + /* All the sensor Registers will be updated */
    + S_UPDATE_ALL,
    + /* Not valid update */
    + S_UPDATE_INVALID
    +};
    +
    +enum msm_s_setting {
    + S_RES_PREVIEW,
    + S_RES_CAPTURE
    +};
    +
    +int msm_camio_enable(struct platform_device *dev);
    +
    +int msm_camio_clk_enable(enum msm_camio_clk_type clk);
    +int msm_camio_clk_disable(enum msm_camio_clk_type clk);
    +int msm_camio_clk_config(uint32_t freq);
    +void msm_camio_clk_rate_set(int rate);
    +void msm_camio_clk_axi_rate_set(int rate);
    +
    +void msm_camio_camif_pad_reg_reset(void);
    +void msm_camio_camif_pad_reg_reset_2(void);
    +
    +void msm_camio_vfe_blk_reset(void);
    +
    +void msm_camio_clk_sel(enum msm_camio_clk_src_type);
    +void msm_camio_disable(struct platform_device *);
    +int msm_camio_probe_on(struct platform_device *);
    +int msm_camio_probe_off(struct platform_device *);
    +#endif
    diff --git a/drivers/staging/dream/include/mach/msm_adsp.h b/drivers/staging/dream/include/mach/msm_adsp.h
    new file mode 100644
    index 0000000..a081683
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/msm_adsp.h
    @@ -0,0 +1,112 @@
    +/* include/asm-arm/arch-msm/msm_adsp.h
    + *
    + * Copyright (C) 2008 Google, Inc.
    + *
    + * This software is licensed under the terms of the GNU General Public
    + * License version 2, as published by the Free Software Foundation, and
    + * may be copied, distributed, and modified under those terms.
    + *
    + * This program is distributed in the hope that it will be useful,
    + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    + * GNU General Public License for more details.
    + *
    + */
    +
    +#ifndef __ASM__ARCH_MSM_ADSP_H
    +#define __ASM__ARCH_MSM_ADSP_H
    +
    +struct msm_adsp_module;
    +
    +struct msm_adsp_ops {
    + /* event is called from interrupt context when a message
    + * arrives from the DSP. Use the provided function pointer
    + * to copy the message into a local buffer. Do NOT call
    + * it multiple times.
    + */
    + void (*event)(void *driver_data, unsigned id, size_t len,
    + void (*getevent)(void *ptr, size_t len));
    +};
    +
    +/* Get, Put, Enable, and Disable are synchronous and must only
    + * be called from thread context. Enable and Disable will block
    + * up to one second in the event of a fatal DSP error but are
    + * much faster otherwise.
    + */
    +int msm_adsp_get(const char *name, struct msm_adsp_module **module,
    + struct msm_adsp_ops *ops, void *driver_data);
    +void msm_adsp_put(struct msm_adsp_module *module);
    +int msm_adsp_enable(struct msm_adsp_module *module);
    +int msm_adsp_disable(struct msm_adsp_module *module);
    +int adsp_set_clkrate(struct msm_adsp_module *module, unsigned long clk_rate);
    +
    +/* Write is safe to call from interrupt context.
    + */
    +int msm_adsp_write(struct msm_adsp_module *module,
    + unsigned queue_id,
    + void *data, size_t len);
    +
    +#if CONFIG_MSM_AMSS_VERSION >= 6350
    +/* Command Queue Indexes */
    +#define QDSP_lpmCommandQueue 0
    +#define QDSP_mpuAfeQueue 1
    +#define QDSP_mpuGraphicsCmdQueue 2
    +#define QDSP_mpuModmathCmdQueue 3
    +#define QDSP_mpuVDecCmdQueue 4
    +#define QDSP_mpuVDecPktQueue 5
    +#define QDSP_mpuVEncCmdQueue 6
    +#define QDSP_rxMpuDecCmdQueue 7
    +#define QDSP_rxMpuDecPktQueue 8
    +#define QDSP_txMpuEncQueue 9
    +#define QDSP_uPAudPPCmd1Queue 10
    +#define QDSP_uPAudPPCmd2Queue 11
    +#define QDSP_uPAudPPCmd3Queue 12
    +#define QDSP_uPAudPlay0BitStreamCtrlQueue 13
    +#define QDSP_uPAudPlay1BitStreamCtrlQueue 14
    +#define QDSP_uPAudPlay2BitStreamCtrlQueue 15
    +#define QDSP_uPAudPlay3BitStreamCtrlQueue 16
    +#define QDSP_uPAudPlay4BitStreamCtrlQueue 17
    +#define QDSP_uPAudPreProcCmdQueue 18
    +#define QDSP_uPAudRecBitStreamQueue 19
    +#define QDSP_uPAudRecCmdQueue 20
    +#define QDSP_uPDiagQueue 21
    +#define QDSP_uPJpegActionCmdQueue 22
    +#define QDSP_uPJpegCfgCmdQueue 23
    +#define QDSP_uPVocProcQueue 24
    +#define QDSP_vfeCommandQueue 25
    +#define QDSP_vfeCommandScaleQueue 26
    +#define QDSP_vfeCommandTableQueue 27
    +#define QDSP_MAX_NUM_QUEUES 28
    +#else
    +/* Command Queue Indexes */
    +#define QDSP_lpmCommandQueue 0
    +#define QDSP_mpuAfeQueue 1
    +#define QDSP_mpuGraphicsCmdQueue 2
    +#define QDSP_mpuModmathCmdQueue 3
    +#define QDSP_mpuVDecCmdQueue 4
    +#define QDSP_mpuVDecPktQueue 5
    +#define QDSP_mpuVEncCmdQueue 6
    +#define QDSP_rxMpuDecCmdQueue 7
    +#define QDSP_rxMpuDecPktQueue 8
    +#define QDSP_txMpuEncQueue 9
    +#define QDSP_uPAudPPCmd1Queue 10
    +#define QDSP_uPAudPPCmd2Queue 11
    +#define QDSP_uPAudPPCmd3Queue 12
    +#define QDSP_uPAudPlay0BitStreamCtrlQueue 13
    +#define QDSP_uPAudPlay1BitStreamCtrlQueue 14
    +#define QDSP_uPAudPlay2BitStreamCtrlQueue 15
    +#define QDSP_uPAudPlay3BitStreamCtrlQueue 16
    +#define QDSP_uPAudPlay4BitStreamCtrlQueue 17
    +#define QDSP_uPAudPreProcCmdQueue 18
    +#define QDSP_uPAudRecBitStreamQueue 19
    +#define QDSP_uPAudRecCmdQueue 20
    +#define QDSP_uPJpegActionCmdQueue 21
    +#define QDSP_uPJpegCfgCmdQueue 22
    +#define QDSP_uPVocProcQueue 23
    +#define QDSP_vfeCommandQueue 24
    +#define QDSP_vfeCommandScaleQueue 25
    +#define QDSP_vfeCommandTableQueue 26
    +#define QDSP_QUEUE_MAX 26
    +#endif
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/msm_rpcrouter.h b/drivers/staging/dream/include/mach/msm_rpcrouter.h
    new file mode 100644
    index 0000000..9724ece
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/msm_rpcrouter.h
    @@ -0,0 +1,179 @@
    +/** include/asm-arm/arch-msm/msm_rpcrouter.h
    + *
    + * Copyright (C) 2007 Google, Inc.
    + * Copyright (c) 2007-2009 QUALCOMM Incorporated
    + * Author: San Mehat <san@android.com>
    + *
    + * This software is licensed under the terms of the GNU General Public
    + * License version 2, as published by the Free Software Foundation, and
    + * may be copied, distributed, and modified under those terms.
    + *
    + * This program is distributed in the hope that it will be useful,
    + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    + * GNU General Public License for more details.
    + *
    + */
    +
    +#ifndef __ASM__ARCH_MSM_RPCROUTER_H
    +#define __ASM__ARCH_MSM_RPCROUTER_H
    +
    +#include <linux/types.h>
    +#include <linux/list.h>
    +#include <linux/platform_device.h>
    +
    +#if CONFIG_MSM_AMSS_VERSION >= 6350
    +/* RPC API version structure
    + * Version bit 31 : 1->hashkey versioning,
    + * 0->major-minor (backward compatible) versioning
    + * hashkey versioning:
    + * Version bits 31-0 hashkey
    + * major-minor (backward compatible) versioning
    + * Version bits 30-28 reserved (no match)
    + * Version bits 27-16 major (must match)
    + * Version bits 15-0 minor (greater or equal)
    + */
    +#define RPC_VERSION_MODE_MASK 0x80000000
    +#define RPC_VERSION_MAJOR_MASK 0x0fff0000
    +#define RPC_VERSION_MAJOR_OFFSET 16
    +#define RPC_VERSION_MINOR_MASK 0x0000ffff
    +
    +#define MSM_RPC_VERS(major, minor) \
    + ((uint32_t)((((major) << RPC_VERSION_MAJOR_OFFSET) & \
    + RPC_VERSION_MAJOR_MASK) | \
    + ((minor) & RPC_VERSION_MINOR_MASK)))
    +#define MSM_RPC_GET_MAJOR(vers) (((vers) & RPC_VERSION_MAJOR_MASK) >> \
    + RPC_VERSION_MAJOR_OFFSET)
    +#define MSM_RPC_GET_MINOR(vers) ((vers) & RPC_VERSION_MINOR_MASK)
    +#else
    +#define MSM_RPC_VERS(major, minor) (major)
    +#define MSM_RPC_GET_MAJOR(vers) (vers)
    +#define MSM_RPC_GET_MINOR(vers) 0
    +#endif
    +
    +struct msm_rpc_endpoint;
    +
    +struct rpcsvr_platform_device
    +{
    + struct platform_device base;
    + uint32_t prog;
    + uint32_t vers;
    +};
    +
    +#define RPC_DATA_IN 0
    +/*
    + * Structures for sending / receiving direct RPC requests
    + * XXX: Any cred/verif lengths > 0 not supported
    + */
    +
    +struct rpc_request_hdr
    +{
    + uint32_t xid;
    + uint32_t type; /* 0 */
    + uint32_t rpc_vers; /* 2 */
    + uint32_t prog;
    + uint32_t vers;
    + uint32_t procedure;
    + uint32_t cred_flavor;
    + uint32_t cred_length;
    + uint32_t verf_flavor;
    + uint32_t verf_length;
    +};
    +
    +typedef struct
    +{
    + uint32_t low;
    + uint32_t high;
    +} rpc_reply_progmismatch_data;
    +
    +typedef struct
    +{
    +} rpc_denied_reply_hdr;
    +
    +typedef struct
    +{
    + uint32_t verf_flavor;
    + uint32_t verf_length;
    + uint32_t accept_stat;
    +#define RPC_ACCEPTSTAT_SUCCESS 0
    +#define RPC_ACCEPTSTAT_PROG_UNAVAIL 1
    +#define RPC_ACCEPTSTAT_PROG_MISMATCH 2
    +#define RPC_ACCEPTSTAT_PROC_UNAVAIL 3
    +#define RPC_ACCEPTSTAT_GARBAGE_ARGS 4
    +#define RPC_ACCEPTSTAT_SYSTEM_ERR 5
    +#define RPC_ACCEPTSTAT_PROG_LOCKED 6
    + /*
    + * Following data is dependant on accept_stat
    + * If ACCEPTSTAT == PROG_MISMATCH then there is a
    + * 'rpc_reply_progmismatch_data' structure following the header.
    + * Otherwise the data is procedure specific
    + */
    +} rpc_accepted_reply_hdr;
    +
    +struct rpc_reply_hdr
    +{
    + uint32_t xid;
    + uint32_t type;
    + uint32_t reply_stat;
    +#define RPCMSG_REPLYSTAT_ACCEPTED 0
    +#define RPCMSG_REPLYSTAT_DENIED 1
    + union {
    + rpc_accepted_reply_hdr acc_hdr;
    + rpc_denied_reply_hdr dny_hdr;
    + } data;
    +};
    +
    +/* flags for msm_rpc_connect() */
    +#define MSM_RPC_UNINTERRUPTIBLE 0x0001
    +
    +/* use IS_ERR() to check for failure */
    +struct msm_rpc_endpoint *msm_rpc_open(void);
    +/* Connect with the specified server version */
    +struct msm_rpc_endpoint *msm_rpc_connect(uint32_t prog, uint32_t vers, unsigned flags);
    +uint32_t msm_rpc_get_vers(struct msm_rpc_endpoint *ept);
    +/* check if server version can handle client requested version */
    +int msm_rpc_is_compatible_version(uint32_t server_version,
    + uint32_t client_version);
    +
    +int msm_rpc_close(struct msm_rpc_endpoint *ept);
    +int msm_rpc_write(struct msm_rpc_endpoint *ept,
    + void *data, int len);
    +int msm_rpc_read(struct msm_rpc_endpoint *ept,
    + void **data, unsigned len, long timeout);
    +void msm_rpc_setup_req(struct rpc_request_hdr *hdr,
    + uint32_t prog, uint32_t vers, uint32_t proc);
    +int msm_rpc_register_server(struct msm_rpc_endpoint *ept,
    + uint32_t prog, uint32_t vers);
    +int msm_rpc_unregister_server(struct msm_rpc_endpoint *ept,
    + uint32_t prog, uint32_t vers);
    +
    +/* simple blocking rpc call
    + *
    + * request is mandatory and must have a rpc_request_hdr
    + * at the start. The header will be filled out for you.
    + *
    + * reply provides a buffer for replies of reply_max_size
    + */
    +int msm_rpc_call_reply(struct msm_rpc_endpoint *ept, uint32_t proc,
    + void *request, int request_size,
    + void *reply, int reply_max_size,
    + long timeout);
    +int msm_rpc_call(struct msm_rpc_endpoint *ept, uint32_t proc,
    + void *request, int request_size,
    + long timeout);
    +
    +struct msm_rpc_server
    +{
    + struct list_head list;
    + uint32_t flags;
    +
    + uint32_t prog;
    + uint32_t vers;
    +
    + int (*rpc_call)(struct msm_rpc_server *server,
    + struct rpc_request_hdr *req, unsigned len);
    +};
    +
    +int msm_rpc_create_server(struct msm_rpc_server *server);
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/msm_smd.h b/drivers/staging/dream/include/mach/msm_smd.h
    new file mode 100644
    index 0000000..bdf7731
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/msm_smd.h
    @@ -0,0 +1,107 @@
    +/* linux/include/asm-arm/arch-msm/msm_smd.h
    + *
    + * Copyright (C) 2007 Google, Inc.
    + * Author: Brian Swetland <swetland@google.com>
    + *
    + * This software is licensed under the terms of the GNU General Public
    + * License version 2, as published by the Free Software Foundation, and
    + * may be copied, distributed, and modified under those terms.
    + *
    + * This program is distributed in the hope that it will be useful,
    + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    + * GNU General Public License for more details.
    + *
    + */
    +
    +#ifndef __ASM_ARCH_MSM_SMD_H
    +#define __ASM_ARCH_MSM_SMD_H
    +
    +typedef struct smd_channel smd_channel_t;
    +
    +/* warning: notify() may be called before open returns */
    +int smd_open(const char *name, smd_channel_t **ch, void *priv,
    + void (*notify)(void *priv, unsigned event));
    +
    +#define SMD_EVENT_DATA 1
    +#define SMD_EVENT_OPEN 2
    +#define SMD_EVENT_CLOSE 3
    +
    +int smd_close(smd_channel_t *ch);
    +
    +/* passing a null pointer for data reads and discards */
    +int smd_read(smd_channel_t *ch, void *data, int len);
    +
    +/* Write to stream channels may do a partial write and return
    +** the length actually written.
    +** Write to packet channels will never do a partial write --
    +** it will return the requested length written or an error.
    +*/
    +int smd_write(smd_channel_t *ch, const void *data, int len);
    +
    +int smd_write_avail(smd_channel_t *ch);
    +int smd_read_avail(smd_channel_t *ch);
    +
    +/* Returns the total size of the current packet being read.
    +** Returns 0 if no packets available or a stream channel.
    +*/
    +int smd_cur_packet_size(smd_channel_t *ch);
    +
    +/* used for tty unthrottling and the like -- causes the notify()
    +** callback to be called from the same lock context as is used
    +** when it is called from channel updates
    +*/
    +void smd_kick(smd_channel_t *ch);
    +
    +
    +#if 0
    +/* these are interruptable waits which will block you until the specified
    +** number of bytes are readable or writable.
    +*/
    +int smd_wait_until_readable(smd_channel_t *ch, int bytes);
    +int smd_wait_until_writable(smd_channel_t *ch, int bytes);
    +#endif
    +
    +typedef enum
    +{
    + SMD_PORT_DS = 0,
    + SMD_PORT_DIAG,
    + SMD_PORT_RPC_CALL,
    + SMD_PORT_RPC_REPLY,
    + SMD_PORT_BT,
    + SMD_PORT_CONTROL,
    + SMD_PORT_MEMCPY_SPARE1,
    + SMD_PORT_DATA1,
    + SMD_PORT_DATA2,
    + SMD_PORT_DATA3,
    + SMD_PORT_DATA4,
    + SMD_PORT_DATA5,
    + SMD_PORT_DATA6,
    + SMD_PORT_DATA7,
    + SMD_PORT_DATA8,
    + SMD_PORT_DATA9,
    + SMD_PORT_DATA10,
    + SMD_PORT_DATA11,
    + SMD_PORT_DATA12,
    + SMD_PORT_DATA13,
    + SMD_PORT_DATA14,
    + SMD_PORT_DATA15,
    + SMD_PORT_DATA16,
    + SMD_PORT_DATA17,
    + SMD_PORT_DATA18,
    + SMD_PORT_DATA19,
    + SMD_PORT_DATA20,
    + SMD_PORT_GPS_NMEA,
    + SMD_PORT_BRIDGE_1,
    + SMD_PORT_BRIDGE_2,
    + SMD_PORT_BRIDGE_3,
    + SMD_PORT_BRIDGE_4,
    + SMD_PORT_BRIDGE_5,
    + SMD_PORT_LOOPBACK,
    + SMD_PORT_CS_APPS_MODEM,
    + SMD_PORT_CS_APPS_DSP,
    + SMD_PORT_CS_MODEM_DSP,
    + SMD_NUM_PORTS,
    +} smd_port_id_type;
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audplaycmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audplaycmdi.h
    new file mode 100644
    index 0000000..ece4bc7
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audplaycmdi.h
    @@ -0,0 +1,94 @@
    +#ifndef QDSP5AUDPLAYCMDI_H
    +#define QDSP5AUDPLAYCMDI_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + Q D S P 5 A U D I O P L A Y T A S K C O M M A N D S
    +
    +GENERAL DESCRIPTION
    + Command Interface for AUDPLAYTASK on QDSP5
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    +
    + audplay_cmd_dec_data_avail
    + Send buffer to AUDPLAY task
    +
    +
    +Copyright(c) 1992 - 2009 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    +$Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audplaycmdi.h#2 $
    +
    +===========================================================================*/
    +
    +#define AUDPLAY_CMD_BITSTREAM_DATA_AVAIL 0x0000
    +#define AUDPLAY_CMD_BITSTREAM_DATA_AVAIL_LEN \
    + sizeof(audplay_cmd_bitstream_data_avail)
    +
    +/* Type specification of dec_data_avail message sent to AUDPLAYTASK
    +*/
    +typedef struct {
    + /*command ID*/
    + unsigned int cmd_id;
    +
    + /* Decoder ID for which message is being sent */
    + unsigned int decoder_id;
    +
    + /* Start address of data in ARM global memory */
    + unsigned int buf_ptr;
    +
    + /* Number of 16-bit words of bit-stream data contiguously available at the
    + * above-mentioned address. */
    + unsigned int buf_size;
    +
    + /* Partition number used by audPlayTask to communicate with DSP's RTOS
    + * kernel */
    + unsigned int partition_number;
    +} __attribute__((packed)) audplay_cmd_bitstream_data_avail;
    +
    +#define AUDPLAY_CMD_HPCM_BUF_CFG 0x0003
    +#define AUDPLAY_CMD_HPCM_BUF_CFG_LEN \
    + sizeof(struct audplay_cmd_hpcm_buf_cfg)
    +
    +struct audplay_cmd_hpcm_buf_cfg {
    + unsigned int cmd_id;
    + unsigned int hostpcm_config;
    + unsigned int feedback_frequency;
    + unsigned int byte_swap;
    + unsigned int max_buffers;
    + unsigned int partition_number;
    +} __attribute__((packed));
    +
    +#define AUDPLAY_CMD_BUFFER_REFRESH 0x0004
    +#define AUDPLAY_CMD_BUFFER_REFRESH_LEN \
    + sizeof(struct audplay_cmd_buffer_update)
    +
    +struct audplay_cmd_buffer_refresh {
    + unsigned int cmd_id;
    + unsigned int num_buffers;
    + unsigned int buf_read_count;
    + unsigned int buf0_address;
    + unsigned int buf0_length;
    + unsigned int buf1_address;
    + unsigned int buf1_length;
    +} __attribute__((packed));
    +#endif /* QDSP5AUDPLAYCMD_H */
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audplaymsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audplaymsg.h
    new file mode 100644
    index 0000000..c63034b
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audplaymsg.h
    @@ -0,0 +1,70 @@
    +#ifndef QDSP5AUDPLAYMSG_H
    +#define QDSP5AUDPLAYMSG_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + Q D S P 5 A U D I O P L A Y T A S K M S G
    +
    +GENERAL DESCRIPTION
    + Message sent by AUDPLAY task
    +
    +REFERENCES
    + None
    +
    +
    +Copyright(c) 1992 - 2009 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    +$Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audplaymsg.h#3 $
    +
    +===========================================================================*/
    +#define AUDPLAY_MSG_DEC_NEEDS_DATA 0x0001
    +#define AUDPLAY_MSG_DEC_NEEDS_DATA_MSG_LEN \
    + sizeof(audplay_msg_dec_needs_data)
    +
    +typedef struct{
    + /* reserved*/
    + unsigned int dec_id;
    +
    + /* The read pointer offset of external memory until which the
    + * bitstream has been DMAed in. */
    + unsigned int adecDataReadPtrOffset;
    +
    + /* The buffer size of external memory. */
    + unsigned int adecDataBufSize;
    +
    + unsigned int bitstream_free_len;
    + unsigned int bitstream_write_ptr;
    + unsigned int bitstarem_buf_start;
    + unsigned int bitstream_buf_len;
    +} __attribute__((packed)) audplay_msg_dec_needs_data;
    +
    +#define AUDPLAY_MSG_BUFFER_UPDATE 0x0004
    +#define AUDPLAY_MSG_BUFFER_UPDATE_LEN \
    + sizeof(struct audplay_msg_buffer_update)
    +
    +struct audplay_msg_buffer_update {
    + unsigned int buffer_write_count;
    + unsigned int num_of_buffer;
    + unsigned int buf0_address;
    + unsigned int buf0_length;
    + unsigned int buf1_address;
    + unsigned int buf1_length;
    +} __attribute__((packed));
    +#endif /* QDSP5AUDPLAYMSG_H */
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audppcmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audppcmdi.h
    new file mode 100644
    index 0000000..8bee9c6
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audppcmdi.h
    @@ -0,0 +1,914 @@
    +#ifndef QDSP5AUDPPCMDI_H
    +#define QDSP5AUDPPCMDI_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + A U D I O P O S T P R O C E S S I N G I N T E R N A L C O M M A N D S
    +
    +GENERAL DESCRIPTION
    + This file contains defintions of format blocks of commands
    + that are accepted by AUDPP Task
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    +$Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audppcmdi.h#2 $
    +
    +===========================================================================*/
    +
    +/*
    + * ARM to AUDPPTASK Commands
    + *
    + * ARM uses three command queues to communicate with AUDPPTASK
    + * 1)uPAudPPCmd1Queue : Used for more frequent and shorter length commands
    + * Location : MEMA
    + * Buffer Size : 6 words
    + * No of buffers in a queue : 20 for gaming audio and 5 for other images
    + * 2)uPAudPPCmd2Queue : Used for commands which are not much lengthier
    + * Location : MEMA
    + * Buffer Size : 23
    + * No of buffers in a queue : 2
    + * 3)uPAudOOCmd3Queue : Used for lengthier and more frequent commands
    + * Location : MEMA
    + * Buffer Size : 145
    + * No of buffers in a queue : 3
    + */
    +
    +/*
    + * Commands Related to uPAudPPCmd1Queue
    + */
    +
    +/*
    + * Command Structure to enable or disable the active decoders
    + */
    +
    +#define AUDPP_CMD_CFG_DEC_TYPE 0x0001
    +#define AUDPP_CMD_CFG_DEC_TYPE_LEN sizeof(audpp_cmd_cfg_dec_type)
    +
    +/* Enable the decoder */
    +#define AUDPP_CMD_DEC_TYPE_M 0x000F
    +
    +#define AUDPP_CMD_ENA_DEC_V 0x4000
    +#define AUDPP_CMD_DIS_DEC_V 0x0000
    +#define AUDPP_CMD_DEC_STATE_M 0x4000
    +
    +#define AUDPP_CMD_UPDATDE_CFG_DEC 0x8000
    +#define AUDPP_CMD_DONT_UPDATE_CFG_DEC 0x0000
    +
    +
    +/* Type specification of cmd_cfg_dec */
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short dec0_cfg;
    + unsigned short dec1_cfg;
    + unsigned short dec2_cfg;
    + unsigned short dec3_cfg;
    + unsigned short dec4_cfg;
    +} __attribute__((packed)) audpp_cmd_cfg_dec_type;
    +
    +/*
    + * Command Structure to Pause , Resume and flushes the selected audio decoders
    + */
    +
    +#define AUDPP_CMD_DEC_CTRL 0x0002
    +#define AUDPP_CMD_DEC_CTRL_LEN sizeof(audpp_cmd_dec_ctrl)
    +
    +/* Decoder control commands for pause, resume and flush */
    +#define AUDPP_CMD_FLUSH_V 0x2000
    +
    +#define AUDPP_CMD_PAUSE_V 0x4000
    +#define AUDPP_CMD_RESUME_V 0x0000
    +
    +#define AUDPP_CMD_UPDATE_V 0x8000
    +#define AUDPP_CMD_IGNORE_V 0x0000
    +
    +
    +/* Type Spec for decoder control command*/
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short dec0_ctrl;
    + unsigned short dec1_ctrl;
    + unsigned short dec2_ctrl;
    + unsigned short dec3_ctrl;
    + unsigned short dec4_ctrl;
    +} __attribute__((packed)) audpp_cmd_dec_ctrl;
    +
    +/*
    + * Command Structure to Configure the AVSync FeedBack Mechanism
    + */
    +
    +#define AUDPP_CMD_AVSYNC 0x0003
    +#define AUDPP_CMD_AVSYNC_LEN sizeof(audpp_cmd_avsync)
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short object_number;
    + unsigned short interrupt_interval_lsw;
    + unsigned short interrupt_interval_msw;
    +} __attribute__((packed)) audpp_cmd_avsync;
    +
    +/*
    + * Command Structure to enable or disable(sleep) the AUDPPTASK
    + */
    +
    +#define AUDPP_CMD_CFG 0x0004
    +#define AUDPP_CMD_CFG_LEN sizeof(audpp_cmd_cfg)
    +
    +#define AUDPP_CMD_CFG_SLEEP 0x0000
    +#define AUDPP_CMD_CFG_ENABLE 0xFFFF
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short cfg;
    +} __attribute__((packed)) audpp_cmd_cfg;
    +
    +/*
    + * Command Structure to Inject or drop the specified no of samples
    + */
    +
    +#define AUDPP_CMD_ADJUST_SAMP 0x0005
    +#define AUDPP_CMD_ADJUST_SAMP_LEN sizeof(audpp_cmd_adjust_samp)
    +
    +#define AUDPP_CMD_SAMP_DROP -1
    +#define AUDPP_CMD_SAMP_INSERT 0x0001
    +
    +#define AUDPP_CMD_NUM_SAMPLES 0x0001
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short object_no;
    + signed short sample_insert_or_drop;
    + unsigned short num_samples;
    +} __attribute__((packed)) audpp_cmd_adjust_samp;
    +
    +/*
    + * Command Structure to Configure AVSync Feedback Mechanism
    + */
    +
    +#define AUDPP_CMD_AVSYNC_CMD_2 0x0006
    +#define AUDPP_CMD_AVSYNC_CMD_2_LEN sizeof(audpp_cmd_avsync_cmd_2)
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short object_number;
    + unsigned short interrupt_interval_lsw;
    + unsigned short interrupt_interval_msw;
    + unsigned short sample_counter_dlsw;
    + unsigned short sample_counter_dmsw;
    + unsigned short sample_counter_msw;
    + unsigned short byte_counter_dlsw;
    + unsigned short byte_counter_dmsw;
    + unsigned short byte_counter_msw;
    +} __attribute__((packed)) audpp_cmd_avsync_cmd_2;
    +
    +/*
    + * Command Structure to Configure AVSync Feedback Mechanism
    + */
    +
    +#define AUDPP_CMD_AVSYNC_CMD_3 0x0007
    +#define AUDPP_CMD_AVSYNC_CMD_3_LEN sizeof(audpp_cmd_avsync_cmd_3)
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short object_number;
    + unsigned short interrupt_interval_lsw;
    + unsigned short interrupt_interval_msw;
    + unsigned short sample_counter_dlsw;
    + unsigned short sample_counter_dmsw;
    + unsigned short sample_counter_msw;
    + unsigned short byte_counter_dlsw;
    + unsigned short byte_counter_dmsw;
    + unsigned short byte_counter_msw;
    +} __attribute__((packed)) audpp_cmd_avsync_cmd_3;
    +
    +#define AUDPP_CMD_ROUTING_MODE 0x0008
    +#define AUDPP_CMD_ROUTING_MODE_LEN \
    +sizeof(struct audpp_cmd_routing_mode)
    +
    +struct audpp_cmd_routing_mode {
    + unsigned short cmd_id;
    + unsigned short object_number;
    + unsigned short routing_mode;
    +} __attribute__((packed));
    +
    +/*
    + * Commands Related to uPAudPPCmd2Queue
    + */
    +
    +/*
    + * Command Structure to configure Per decoder Parameters (Common)
    + */
    +
    +#define AUDPP_CMD_CFG_ADEC_PARAMS 0x0000
    +#define AUDPP_CMD_CFG_ADEC_PARAMS_COMMON_LEN \
    + sizeof(audpp_cmd_cfg_adec_params_common)
    +
    +#define AUDPP_CMD_STATUS_MSG_FLAG_ENA_FCM 0x4000
    +#define AUDPP_CMD_STATUS_MSG_FLAG_DIS_FCM 0x0000
    +
    +#define AUDPP_CMD_STATUS_MSG_FLAG_ENA_DCM 0x8000
    +#define AUDPP_CMD_STATUS_MSG_FLAG_DIS_DCM 0x0000
    +
    +/* Sampling frequency*/
    +#define AUDPP_CMD_SAMP_RATE_96000 0x0000
    +#define AUDPP_CMD_SAMP_RATE_88200 0x0001
    +#define AUDPP_CMD_SAMP_RATE_64000 0x0002
    +#define AUDPP_CMD_SAMP_RATE_48000 0x0003
    +#define AUDPP_CMD_SAMP_RATE_44100 0x0004
    +#define AUDPP_CMD_SAMP_RATE_32000 0x0005
    +#define AUDPP_CMD_SAMP_RATE_24000 0x0006
    +#define AUDPP_CMD_SAMP_RATE_22050 0x0007
    +#define AUDPP_CMD_SAMP_RATE_16000 0x0008
    +#define AUDPP_CMD_SAMP_RATE_12000 0x0009
    +#define AUDPP_CMD_SAMP_RATE_11025 0x000A
    +#define AUDPP_CMD_SAMP_RATE_8000 0x000B
    +
    +
    +/*
    + * Type specification of cmd_adec_cfg sent to all decoder
    + */
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short length;
    + unsigned short dec_id;
    + unsigned short status_msg_flag;
    + unsigned short decoder_frame_counter_msg_period;
    + unsigned short input_sampling_frequency;
    +} __attribute__((packed)) audpp_cmd_cfg_adec_params_common;
    +
    +/*
    + * Command Structure to configure Per decoder Parameters (Wav)
    + */
    +
    +#define AUDPP_CMD_CFG_ADEC_PARAMS_WAV_LEN \
    + sizeof(audpp_cmd_cfg_adec_params_wav)
    +
    +
    +#define AUDPP_CMD_WAV_STEREO_CFG_MONO 0x0001
    +#define AUDPP_CMD_WAV_STEREO_CFG_STEREO 0x0002
    +
    +#define AUDPP_CMD_WAV_PCM_WIDTH_8 0x0000
    +#define AUDPP_CMD_WAV_PCM_WIDTH_16 0x0001
    +#define AUDPP_CMD_WAV_PCM_WIDTH_32 0x0002
    +
    +typedef struct {
    + audpp_cmd_cfg_adec_params_common common;
    + unsigned short stereo_cfg;
    + unsigned short pcm_width;
    + unsigned short sign;
    +} __attribute__((packed)) audpp_cmd_cfg_adec_params_wav;
    +
    +/*
    + * Command Structure to configure Per decoder Parameters (ADPCM)
    + */
    +
    +#define AUDPP_CMD_CFG_ADEC_PARAMS_ADPCM_LEN \
    + sizeof(audpp_cmd_cfg_adec_params_adpcm)
    +
    +
    +#define AUDPP_CMD_ADPCM_STEREO_CFG_MONO 0x0001
    +#define AUDPP_CMD_ADPCM_STEREO_CFG_STEREO 0x0002
    +
    +typedef struct {
    + audpp_cmd_cfg_adec_params_common common;
    + unsigned short stereo_cfg;
    + unsigned short block_size;
    +} __attribute__((packed)) audpp_cmd_cfg_adec_params_adpcm;
    +
    +/*
    + * Command Structure to configure Per decoder Parameters (MP3)
    + */
    +
    +#define AUDPP_CMD_CFG_ADEC_PARAMS_MP3_LEN \
    + sizeof(audpp_cmd_cfg_adec_params_mp3)
    +
    +typedef struct {
    + audpp_cmd_cfg_adec_params_common common;
    +} __attribute__((packed)) audpp_cmd_cfg_adec_params_mp3;
    +
    +
    +/*
    + * Command Structure to configure Per decoder Parameters (AAC)
    + */
    +
    +#define AUDPP_CMD_CFG_ADEC_PARAMS_AAC_LEN \
    + sizeof(audpp_cmd_cfg_adec_params_aac)
    +
    +
    +#define AUDPP_CMD_AAC_FORMAT_ADTS -1
    +#define AUDPP_CMD_AAC_FORMAT_RAW 0x0000
    +#define AUDPP_CMD_AAC_FORMAT_PSUEDO_RAW 0x0001
    +#define AUDPP_CMD_AAC_FORMAT_LOAS 0x0002
    +
    +#define AUDPP_CMD_AAC_AUDIO_OBJECT_LC 0x0002
    +#define AUDPP_CMD_AAC_AUDIO_OBJECT_LTP 0x0004
    +#define AUDPP_CMD_AAC_AUDIO_OBJECT_ERLC 0x0011
    +
    +#define AUDPP_CMD_AAC_SBR_ON_FLAG_ON 0x0001
    +#define AUDPP_CMD_AAC_SBR_ON_FLAG_OFF 0x0000
    +
    +#define AUDPP_CMD_AAC_SBR_PS_ON_FLAG_ON 0x0001
    +#define AUDPP_CMD_AAC_SBR_PS_ON_FLAG_OFF 0x0000
    +
    +typedef struct {
    + audpp_cmd_cfg_adec_params_common common;
    + signed short format;
    + unsigned short audio_object;
    + unsigned short ep_config;
    + unsigned short aac_section_data_resilience_flag;
    + unsigned short aac_scalefactor_data_resilience_flag;
    + unsigned short aac_spectral_data_resilience_flag;
    + unsigned short sbr_on_flag;
    + unsigned short sbr_ps_on_flag;
    + unsigned short dual_mono_mode;
    + unsigned short channel_configuration;
    +} __attribute__((packed)) audpp_cmd_cfg_adec_params_aac;
    +
    +/*
    + * Command Structure to configure Per decoder Parameters (V13K)
    + */
    +
    +#define AUDPP_CMD_CFG_ADEC_PARAMS_V13K_LEN \
    + sizeof(struct audpp_cmd_cfg_adec_params_v13k)
    +
    +
    +#define AUDPP_CMD_STEREO_CFG_MONO 0x0001
    +#define AUDPP_CMD_STEREO_CFG_STEREO 0x0002
    +
    +struct audpp_cmd_cfg_adec_params_v13k {
    + audpp_cmd_cfg_adec_params_common common;
    + unsigned short stereo_cfg;
    +} __attribute__((packed));
    +
    +#define AUDPP_CMD_CFG_ADEC_PARAMS_EVRC_LEN \
    + sizeof(struct audpp_cmd_cfg_adec_params_evrc)
    +
    +struct audpp_cmd_cfg_adec_params_evrc {
    + audpp_cmd_cfg_adec_params_common common;
    + unsigned short stereo_cfg;
    +} __attribute__ ((packed));
    +
    +/*
    + * Command Structure to configure the HOST PCM interface
    + */
    +
    +#define AUDPP_CMD_PCM_INTF 0x0001
    +#define AUDPP_CMD_PCM_INTF_2 0x0002
    +#define AUDPP_CMD_PCM_INTF_LEN sizeof(audpp_cmd_pcm_intf)
    +
    +#define AUDPP_CMD_PCM_INTF_MONO_V 0x0001
    +#define AUDPP_CMD_PCM_INTF_STEREO_V 0x0002
    +
    +/* These two values differentiate the two types of commands that could be issued
    + * Interface configuration command and Buffer update command */
    +
    +#define AUDPP_CMD_PCM_INTF_CONFIG_CMD_V 0x0000
    +#define AUDPP_CMD_PCM_INTF_BUFFER_CMD_V -1
    +
    +#define AUDPP_CMD_PCM_INTF_RX_ENA_M 0x000F
    +#define AUDPP_CMD_PCM_INTF_RX_ENA_ARMTODSP_V 0x0008
    +#define AUDPP_CMD_PCM_INTF_RX_ENA_DSPTOARM_V 0x0004
    +
    +/* These flags control the enabling and disabling of the interface together
    + * with host interface bit mask. */
    +
    +#define AUDPP_CMD_PCM_INTF_ENA_V -1
    +#define AUDPP_CMD_PCM_INTF_DIS_V 0x0000
    +
    +
    +#define AUDPP_CMD_PCM_INTF_FULL_DUPLEX 0x0
    +#define AUDPP_CMD_PCM_INTF_HALF_DUPLEX_TODSP 0x1
    +
    +
    +#define AUDPP_CMD_PCM_INTF_OBJECT_NUM 0x5
    +#define AUDPP_CMD_PCM_INTF_COMMON_OBJECT_NUM 0x6
    +
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short object_num;
    + signed short config;
    + unsigned short intf_type;
    +
    + /* DSP -> ARM Configuration */
    + unsigned short read_buf1LSW;
    + unsigned short read_buf1MSW;
    + unsigned short read_buf1_len;
    +
    + unsigned short read_buf2LSW;
    + unsigned short read_buf2MSW;
    + unsigned short read_buf2_len;
    + /* 0:HOST_PCM_INTF disable
    + ** 0xFFFF: HOST_PCM_INTF enable
    + */
    + signed short dsp_to_arm_flag;
    + unsigned short partition_number;
    +
    + /* ARM -> DSP Configuration */
    + unsigned short write_buf1LSW;
    + unsigned short write_buf1MSW;
    + unsigned short write_buf1_len;
    +
    + unsigned short write_buf2LSW;
    + unsigned short write_buf2MSW;
    + unsigned short write_buf2_len;
    +
    + /* 0:HOST_PCM_INTF disable
    + ** 0xFFFF: HOST_PCM_INTF enable
    + */
    + signed short arm_to_rx_flag;
    + unsigned short weight_decoder_to_rx;
    + unsigned short weight_arm_to_rx;
    +
    + unsigned short partition_number_arm_to_dsp;
    + unsigned short sample_rate;
    + unsigned short channel_mode;
    +} __attribute__((packed)) audpp_cmd_pcm_intf;
    +
    +/*
    + ** BUFFER UPDATE COMMAND
    + */
    +#define AUDPP_CMD_PCM_INTF_SEND_BUF_PARAMS_LEN \
    + sizeof(audpp_cmd_pcm_intf_send_buffer)
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short host_pcm_object;
    + /* set config = 0xFFFF for configuration*/
    + signed short config;
    + unsigned short intf_type;
    + unsigned short dsp_to_arm_buf_id;
    + unsigned short arm_to_dsp_buf_id;
    + unsigned short arm_to_dsp_buf_len;
    +} __attribute__((packed)) audpp_cmd_pcm_intf_send_buffer;
    +
    +
    +/*
    + * Commands Related to uPAudPPCmd3Queue
    + */
    +
    +/*
    + * Command Structure to configure post processing params (Commmon)
    + */
    +
    +#define AUDPP_CMD_CFG_OBJECT_PARAMS 0x0000
    +#define AUDPP_CMD_CFG_OBJECT_PARAMS_COMMON_LEN \
    + sizeof(audpp_cmd_cfg_object_params_common)
    +
    +#define AUDPP_CMD_OBJ0_UPDATE 0x8000
    +#define AUDPP_CMD_OBJ0_DONT_UPDATE 0x0000
    +
    +#define AUDPP_CMD_OBJ1_UPDATE 0x8000
    +#define AUDPP_CMD_OBJ1_DONT_UPDATE 0x0000
    +
    +#define AUDPP_CMD_OBJ2_UPDATE 0x8000
    +#define AUDPP_CMD_OBJ2_DONT_UPDATE 0x0000
    +
    +#define AUDPP_CMD_OBJ3_UPDATE 0x8000
    +#define AUDPP_CMD_OBJ3_DONT_UPDATE 0x0000
    +
    +#define AUDPP_CMD_OBJ4_UPDATE 0x8000
    +#define AUDPP_CMD_OBJ4_DONT_UPDATE 0x0000
    +
    +#define AUDPP_CMD_HPCM_UPDATE 0x8000
    +#define AUDPP_CMD_HPCM_DONT_UPDATE 0x0000
    +
    +#define AUDPP_CMD_COMMON_CFG_UPDATE 0x8000
    +#define AUDPP_CMD_COMMON_CFG_DONT_UPDATE 0x0000
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short obj0_cfg;
    + unsigned short obj1_cfg;
    + unsigned short obj2_cfg;
    + unsigned short obj3_cfg;
    + unsigned short obj4_cfg;
    + unsigned short host_pcm_obj_cfg;
    + unsigned short comman_cfg;
    + unsigned short command_type;
    +} __attribute__((packed)) audpp_cmd_cfg_object_params_common;
    +
    +/*
    + * Command Structure to configure post processing params (Volume)
    + */
    +
    +#define AUDPP_CMD_CFG_OBJECT_PARAMS_VOLUME_LEN \
    + sizeof(audpp_cmd_cfg_object_params_volume)
    +
    +typedef struct {
    + audpp_cmd_cfg_object_params_common common;
    + unsigned short volume;
    + unsigned short pan;
    +} __attribute__((packed)) audpp_cmd_cfg_object_params_volume;
    +
    +/*
    + * Command Structure to configure post processing params (PCM Filter) --DOUBT
    + */
    +
    +typedef struct {
    + unsigned short numerator_b0_filter_lsw;
    + unsigned short numerator_b0_filter_msw;
    + unsigned short numerator_b1_filter_lsw;
    + unsigned short numerator_b1_filter_msw;
    + unsigned short numerator_b2_filter_lsw;
    + unsigned short numerator_b2_filter_msw;
    +} __attribute__((packed)) numerator;
    +
    +typedef struct {
    + unsigned short denominator_a0_filter_lsw;
    + unsigned short denominator_a0_filter_msw;
    + unsigned short denominator_a1_filter_lsw;
    + unsigned short denominator_a1_filter_msw;
    +} __attribute__((packed)) denominator;
    +
    +typedef struct {
    + unsigned short shift_factor_0;
    +} __attribute__((packed)) shift_factor;
    +
    +typedef struct {
    + unsigned short pan_filter_0;
    +} __attribute__((packed)) pan;
    +
    +typedef struct {
    + numerator numerator_filter;
    + denominator denominator_filter;
    + shift_factor shift_factor_filter;
    + pan pan_filter;
    +} __attribute__((packed)) filter_1;
    +
    +typedef struct {
    + numerator numerator_filter[2];
    + denominator denominator_filter[2];
    + shift_factor shift_factor_filter[2];
    + pan pan_filter[2];
    +} __attribute__((packed)) filter_2;
    +
    +typedef struct {
    + numerator numerator_filter[3];
    + denominator denominator_filter[3];
    + shift_factor shift_factor_filter[3];
    + pan pan_filter[3];
    +} __attribute__((packed)) filter_3;
    +
    +typedef struct {
    + numerator numerator_filter[4];
    + denominator denominator_filter[4];
    + shift_factor shift_factor_filter[4];
    + pan pan_filter[4];
    +} __attribute__((packed)) filter_4;
    +
    +#define AUDPP_CMD_CFG_OBJECT_PARAMS_PCM_LEN \
    + sizeof(audpp_cmd_cfg_object_params_pcm)
    +
    +
    +typedef struct {
    + audpp_cmd_cfg_object_params_common common;
    + unsigned short active_flag;
    + unsigned short num_bands;
    + union {
    + filter_1 filter_1_params;
    + filter_2 filter_2_params;
    + filter_3 filter_3_params;
    + filter_4 filter_4_params;
    + } __attribute__((packed)) params_filter;
    +} __attribute__((packed)) audpp_cmd_cfg_object_params_pcm;
    +
    +
    +/*
    + * Command Structure to configure post processing parameters (equalizer)
    + */
    +
    +#define AUDPP_CMD_CFG_OBJECT_PARAMS_EQALIZER_LEN \
    + sizeof(audpp_cmd_cfg_object_params_eqalizer)
    +
    +typedef struct {
    + unsigned short numerator_coeff_0_lsw;
    + unsigned short numerator_coeff_0_msw;
    + unsigned short numerator_coeff_1_lsw;
    + unsigned short numerator_coeff_1_msw;
    + unsigned short numerator_coeff_2_lsw;
    + unsigned short numerator_coeff_2_msw;
    +} __attribute__((packed)) eq_numerator;
    +
    +typedef struct {
    + unsigned short denominator_coeff_0_lsw;
    + unsigned short denominator_coeff_0_msw;
    + unsigned short denominator_coeff_1_lsw;
    + unsigned short denominator_coeff_1_msw;
    +} __attribute__((packed)) eq_denominator;
    +
    +typedef struct {
    + unsigned short shift_factor;
    +} __attribute__((packed)) eq_shiftfactor;
    +
    +typedef struct {
    + eq_numerator numerator;
    + eq_denominator denominator;
    + eq_shiftfactor shiftfactor;
    +} __attribute__((packed)) eq_coeff_1;
    +
    +typedef struct {
    + eq_numerator numerator[2];
    + eq_denominator denominator[2];
    + eq_shiftfactor shiftfactor[2];
    +} __attribute__((packed)) eq_coeff_2;
    +
    +typedef struct {
    + eq_numerator numerator[3];
    + eq_denominator denominator[3];
    + eq_shiftfactor shiftfactor[3];
    +} __attribute__((packed)) eq_coeff_3;
    +
    +typedef struct {
    + eq_numerator numerator[4];
    + eq_denominator denominator[4];
    + eq_shiftfactor shiftfactor[4];
    +} __attribute__((packed)) eq_coeff_4;
    +
    +typedef struct {
    + eq_numerator numerator[5];
    + eq_denominator denominator[5];
    + eq_shiftfactor shiftfactor[5];
    +} __attribute__((packed)) eq_coeff_5;
    +
    +typedef struct {
    + eq_numerator numerator[6];
    + eq_denominator denominator[6];
    + eq_shiftfactor shiftfactor[6];
    +} __attribute__((packed)) eq_coeff_6;
    +
    +typedef struct {
    + eq_numerator numerator[7];
    + eq_denominator denominator[7];
    + eq_shiftfactor shiftfactor[7];
    +} __attribute__((packed)) eq_coeff_7;
    +
    +typedef struct {
    + eq_numerator numerator[8];
    + eq_denominator denominator[8];
    + eq_shiftfactor shiftfactor[8];
    +} __attribute__((packed)) eq_coeff_8;
    +
    +typedef struct {
    + eq_numerator numerator[9];
    + eq_denominator denominator[9];
    + eq_shiftfactor shiftfactor[9];
    +} __attribute__((packed)) eq_coeff_9;
    +
    +typedef struct {
    + eq_numerator numerator[10];
    + eq_denominator denominator[10];
    + eq_shiftfactor shiftfactor[10];
    +} __attribute__((packed)) eq_coeff_10;
    +
    +typedef struct {
    + eq_numerator numerator[11];
    + eq_denominator denominator[11];
    + eq_shiftfactor shiftfactor[11];
    +} __attribute__((packed)) eq_coeff_11;
    +
    +typedef struct {
    + eq_numerator numerator[12];
    + eq_denominator denominator[12];
    + eq_shiftfactor shiftfactor[12];
    +} __attribute__((packed)) eq_coeff_12;
    +
    +
    +typedef struct {
    + audpp_cmd_cfg_object_params_common common;
    + unsigned short eq_flag;
    + unsigned short num_bands;
    + union {
    + eq_coeff_1 eq_coeffs_1;
    + eq_coeff_2 eq_coeffs_2;
    + eq_coeff_3 eq_coeffs_3;
    + eq_coeff_4 eq_coeffs_4;
    + eq_coeff_5 eq_coeffs_5;
    + eq_coeff_6 eq_coeffs_6;
    + eq_coeff_7 eq_coeffs_7;
    + eq_coeff_8 eq_coeffs_8;
    + eq_coeff_9 eq_coeffs_9;
    + eq_coeff_10 eq_coeffs_10;
    + eq_coeff_11 eq_coeffs_11;
    + eq_coeff_12 eq_coeffs_12;
    + } __attribute__((packed)) eq_coeff;
    +} __attribute__((packed)) audpp_cmd_cfg_object_params_eqalizer;
    +
    +
    +/*
    + * Command Structure to configure post processing parameters (ADRC)
    + */
    +
    +#define AUDPP_CMD_CFG_OBJECT_PARAMS_ADRC_LEN \
    + sizeof(audpp_cmd_cfg_object_params_adrc)
    +
    +
    +#define AUDPP_CMD_ADRC_FLAG_DIS 0x0000
    +#define AUDPP_CMD_ADRC_FLAG_ENA -1
    +
    +typedef struct {
    + audpp_cmd_cfg_object_params_common common;
    + signed short adrc_flag;
    + unsigned short compression_th;
    + unsigned short compression_slope;
    + unsigned short rms_time;
    + unsigned short attack_const_lsw;
    + unsigned short attack_const_msw;
    + unsigned short release_const_lsw;
    + unsigned short release_const_msw;
    + unsigned short adrc_system_delay;
    +} __attribute__((packed)) audpp_cmd_cfg_object_params_adrc;
    +
    +/*
    + * Command Structure to configure post processing parameters(Spectrum Analizer)
    + */
    +
    +#define AUDPP_CMD_CFG_OBJECT_PARAMS_SPECTRAM_LEN \
    + sizeof(audpp_cmd_cfg_object_params_spectram)
    +
    +
    +typedef struct {
    + audpp_cmd_cfg_object_params_common common;
    + unsigned short sample_interval;
    + unsigned short num_coeff;
    +} __attribute__((packed)) audpp_cmd_cfg_object_params_spectram;
    +
    +/*
    + * Command Structure to configure post processing parameters (QConcert)
    + */
    +
    +#define AUDPP_CMD_CFG_OBJECT_PARAMS_QCONCERT_LEN \
    + sizeof(audpp_cmd_cfg_object_params_qconcert)
    +
    +
    +#define AUDPP_CMD_QCON_ENA_FLAG_ENA -1
    +#define AUDPP_CMD_QCON_ENA_FLAG_DIS 0x0000
    +
    +#define AUDPP_CMD_QCON_OP_MODE_HEADPHONE -1
    +#define AUDPP_CMD_QCON_OP_MODE_SPEAKER_FRONT 0x0000
    +#define AUDPP_CMD_QCON_OP_MODE_SPEAKER_SIDE 0x0001
    +#define AUDPP_CMD_QCON_OP_MODE_SPEAKER_DESKTOP 0x0002
    +
    +#define AUDPP_CMD_QCON_GAIN_UNIT 0x7FFF
    +#define AUDPP_CMD_QCON_GAIN_SIX_DB 0x4027
    +
    +
    +#define AUDPP_CMD_QCON_EXPANSION_MAX 0x7FFF
    +
    +
    +typedef struct {
    + audpp_cmd_cfg_object_params_common common;
    + signed short enable_flag;
    + signed short output_mode;
    + signed short gain;
    + signed short expansion;
    + signed short delay;
    + unsigned short stages_per_mode;
    +} __attribute__((packed)) audpp_cmd_cfg_object_params_qconcert;
    +
    +/*
    + * Command Structure to configure post processing parameters (Side Chain)
    + */
    +
    +#define AUDPP_CMD_CFG_OBJECT_PARAMS_SIDECHAIN_LEN \
    + sizeof(audpp_cmd_cfg_object_params_sidechain)
    +
    +
    +#define AUDPP_CMD_SIDECHAIN_ACTIVE_FLAG_DIS 0x0000
    +#define AUDPP_CMD_SIDECHAIN_ACTIVE_FLAG_ENA -1
    +
    +typedef struct {
    + audpp_cmd_cfg_object_params_common common;
    + signed short active_flag;
    + unsigned short num_bands;
    + union {
    + filter_1 filter_1_params;
    + filter_2 filter_2_params;
    + filter_3 filter_3_params;
    + filter_4 filter_4_params;
    + } __attribute__((packed)) params_filter;
    +} __attribute__((packed)) audpp_cmd_cfg_object_params_sidechain;
    +
    +
    +/*
    + * Command Structure to configure post processing parameters (QAFX)
    + */
    +
    +#define AUDPP_CMD_CFG_OBJECT_PARAMS_QAFX_LEN \
    + sizeof(audpp_cmd_cfg_object_params_qafx)
    +
    +#define AUDPP_CMD_QAFX_ENA_DISA 0x0000
    +#define AUDPP_CMD_QAFX_ENA_ENA_CFG -1
    +#define AUDPP_CMD_QAFX_ENA_DIS_CFG 0x0001
    +
    +#define AUDPP_CMD_QAFX_CMD_TYPE_ENV 0x0100
    +#define AUDPP_CMD_QAFX_CMD_TYPE_OBJ 0x0010
    +#define AUDPP_CMD_QAFX_CMD_TYPE_QUERY 0x1000
    +
    +#define AUDPP_CMD_QAFX_CMDS_ENV_OP_MODE 0x0100
    +#define AUDPP_CMD_QAFX_CMDS_ENV_LIS_POS 0x0101
    +#define AUDPP_CMD_QAFX_CMDS_ENV_LIS_ORI 0x0102
    +#define AUDPP_CMD_QAFX_CMDS_ENV_LIS_VEL 0X0103
    +#define AUDPP_CMD_QAFX_CMDS_ENV_ENV_RES 0x0107
    +
    +#define AUDPP_CMD_QAFX_CMDS_OBJ_SAMP_FREQ 0x0010
    +#define AUDPP_CMD_QAFX_CMDS_OBJ_VOL 0x0011
    +#define AUDPP_CMD_QAFX_CMDS_OBJ_DIST 0x0012
    +#define AUDPP_CMD_QAFX_CMDS_OBJ_POS 0x0013
    +#define AUDPP_CMD_QAFX_CMDS_OBJ_VEL 0x0014
    +
    +
    +typedef struct {
    + audpp_cmd_cfg_object_params_common common;
    + signed short enable;
    + unsigned short command_type;
    + unsigned short num_commands;
    + unsigned short commands;
    +} __attribute__((packed)) audpp_cmd_cfg_object_params_qafx;
    +
    +/*
    + * Command Structure to enable , disable or configure the reverberation effect
    + * (Common)
    + */
    +
    +#define AUDPP_CMD_REVERB_CONFIG 0x0001
    +#define AUDPP_CMD_REVERB_CONFIG_COMMON_LEN \
    + sizeof(audpp_cmd_reverb_config_common)
    +
    +#define AUDPP_CMD_ENA_ENA 0xFFFF
    +#define AUDPP_CMD_ENA_DIS 0x0000
    +#define AUDPP_CMD_ENA_CFG 0x0001
    +
    +#define AUDPP_CMD_CMD_TYPE_ENV 0x0104
    +#define AUDPP_CMD_CMD_TYPE_OBJ 0x0015
    +#define AUDPP_CMD_CMD_TYPE_QUERY 0x1000
    +
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short enable;
    + unsigned short cmd_type;
    +} __attribute__((packed)) audpp_cmd_reverb_config_common;
    +
    +/*
    + * Command Structure to enable , disable or configure the reverberation effect
    + * (ENV-0x0104)
    + */
    +
    +#define AUDPP_CMD_REVERB_CONFIG_ENV_104_LEN \
    + sizeof(audpp_cmd_reverb_config_env_104)
    +
    +typedef struct {
    + audpp_cmd_reverb_config_common common;
    + unsigned short env_gain;
    + unsigned short decay_msw;
    + unsigned short decay_lsw;
    + unsigned short decay_timeratio_msw;
    + unsigned short decay_timeratio_lsw;
    + unsigned short delay_time;
    + unsigned short reverb_gain;
    + unsigned short reverb_delay;
    +} __attribute__((packed)) audpp_cmd_reverb_config_env_104;
    +
    +/*
    + * Command Structure to enable , disable or configure the reverberation effect
    + * (ENV-0x0015)
    + */
    +
    +#define AUDPP_CMD_REVERB_CONFIG_ENV_15_LEN \
    + sizeof(audpp_cmd_reverb_config_env_15)
    +
    +typedef struct {
    + audpp_cmd_reverb_config_common common;
    + unsigned short object_num;
    + unsigned short absolute_gain;
    +} __attribute__((packed)) audpp_cmd_reverb_config_env_15;
    +
    +
    +#endif /* QDSP5AUDPPCMDI_H */
    +
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audppmsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audppmsg.h
    new file mode 100644
    index 0000000..e229df3
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audppmsg.h
    @@ -0,0 +1,318 @@
    +#ifndef QDSP5AUDPPMSG_H
    +#define QDSP5AUDPPMSG_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + Q D S P 5 A U D I O P O S T P R O C E S S I N G M S G
    +
    +GENERAL DESCRIPTION
    + Messages sent by AUDPPTASK to ARM
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 1992 - 2009 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    + $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audppmsg.h#4 $
    +
    +===========================================================================*/
    +
    +/*
    + * AUDPPTASK uses audPPuPRlist to send messages to the ARM
    + * Location : MEMA
    + * Buffer Size : 45
    + * No of Buffers in a queue : 5 for gaming audio and 1 for other images
    + */
    +
    +/*
    + * MSG to Informs the ARM os Success/Failure of bringing up the decoder
    + */
    +
    +#define AUDPP_MSG_STATUS_MSG 0x0001
    +#define AUDPP_MSG_STATUS_MSG_LEN \
    + sizeof(audpp_msg_status_msg)
    +
    +#define AUDPP_MSG_STATUS_SLEEP 0x0000
    +#define AUDPP_MSG__STATUS_INIT 0x0001
    +#define AUDPP_MSG_MSG_STATUS_CFG 0x0002
    +#define AUDPP_MSG_STATUS_PLAY 0x0003
    +
    +#define AUDPP_MSG_REASON_MIPS 0x0000
    +#define AUDPP_MSG_REASON_MEM 0x0001
    +
    +typedef struct{
    + unsigned short dec_id;
    + unsigned short status;
    + unsigned short reason;
    +} __attribute__((packed)) audpp_msg_status_msg;
    +
    +/*
    + * MSG to communicate the spectrum analyzer output bands to the ARM
    + */
    +#define AUDPP_MSG_SPA_BANDS 0x0002
    +#define AUDPP_MSG_SPA_BANDS_LEN \
    + sizeof(audpp_msg_spa_bands)
    +
    +typedef struct {
    + unsigned short current_object;
    + unsigned short spa_band_1;
    + unsigned short spa_band_2;
    + unsigned short spa_band_3;
    + unsigned short spa_band_4;
    + unsigned short spa_band_5;
    + unsigned short spa_band_6;
    + unsigned short spa_band_7;
    + unsigned short spa_band_8;
    + unsigned short spa_band_9;
    + unsigned short spa_band_10;
    + unsigned short spa_band_11;
    + unsigned short spa_band_12;
    + unsigned short spa_band_13;
    + unsigned short spa_band_14;
    + unsigned short spa_band_15;
    + unsigned short spa_band_16;
    + unsigned short spa_band_17;
    + unsigned short spa_band_18;
    + unsigned short spa_band_19;
    + unsigned short spa_band_20;
    + unsigned short spa_band_21;
    + unsigned short spa_band_22;
    + unsigned short spa_band_23;
    + unsigned short spa_band_24;
    + unsigned short spa_band_25;
    + unsigned short spa_band_26;
    + unsigned short spa_band_27;
    + unsigned short spa_band_28;
    + unsigned short spa_band_29;
    + unsigned short spa_band_30;
    + unsigned short spa_band_31;
    + unsigned short spa_band_32;
    +} __attribute__((packed)) audpp_msg_spa_bands;
    +
    +/*
    + * MSG to communicate the PCM I/O buffer status to ARM
    + */
    +#define AUDPP_MSG_HOST_PCM_INTF_MSG 0x0003
    +#define AUDPP_MSG_HOST_PCM_INTF_MSG_LEN \
    + sizeof(audpp_msg_host_pcm_intf_msg)
    +
    +#define AUDPP_MSG_HOSTPCM_ID_TX_ARM 0x0000
    +#define AUDPP_MSG_HOSTPCM_ID_ARM_TX 0x0001
    +#define AUDPP_MSG_HOSTPCM_ID_RX_ARM 0x0002
    +#define AUDPP_MSG_HOSTPCM_ID_ARM_RX 0x0003
    +
    +#define AUDPP_MSG_SAMP_FREQ_INDX_96000 0x0000
    +#define AUDPP_MSG_SAMP_FREQ_INDX_88200 0x0001
    +#define AUDPP_MSG_SAMP_FREQ_INDX_64000 0x0002
    +#define AUDPP_MSG_SAMP_FREQ_INDX_48000 0x0003
    +#define AUDPP_MSG_SAMP_FREQ_INDX_44100 0x0004
    +#define AUDPP_MSG_SAMP_FREQ_INDX_32000 0x0005
    +#define AUDPP_MSG_SAMP_FREQ_INDX_24000 0x0006
    +#define AUDPP_MSG_SAMP_FREQ_INDX_22050 0x0007
    +#define AUDPP_MSG_SAMP_FREQ_INDX_16000 0x0008
    +#define AUDPP_MSG_SAMP_FREQ_INDX_12000 0x0009
    +#define AUDPP_MSG_SAMP_FREQ_INDX_11025 0x000A
    +#define AUDPP_MSG_SAMP_FREQ_INDX_8000 0x000B
    +
    +#define AUDPP_MSG_CHANNEL_MODE_MONO 0x0001
    +#define AUDPP_MSG_CHANNEL_MODE_STEREO 0x0002
    +
    +typedef struct{
    + unsigned short obj_num;
    + unsigned short numbers_of_samples;
    + unsigned short host_pcm_id;
    + unsigned short buf_indx;
    + unsigned short samp_freq_indx;
    + unsigned short channel_mode;
    +} __attribute__((packed)) audpp_msg_host_pcm_intf_msg;
    +
    +
    +/*
    + * MSG to communicate 3D position of the source and listener , source volume
    + * source rolloff, source orientation
    + */
    +
    +#define AUDPP_MSG_QAFX_POS 0x0004
    +#define AUDPP_MSG_QAFX_POS_LEN \
    + sizeof(audpp_msg_qafx_pos)
    +
    +typedef struct {
    + unsigned short current_object;
    + unsigned short x_pos_lis_msw;
    + unsigned short x_pos_lis_lsw;
    + unsigned short y_pos_lis_msw;
    + unsigned short y_pos_lis_lsw;
    + unsigned short z_pos_lis_msw;
    + unsigned short z_pos_lis_lsw;
    + unsigned short x_fwd_msw;
    + unsigned short x_fwd_lsw;
    + unsigned short y_fwd_msw;
    + unsigned short y_fwd_lsw;
    + unsigned short z_fwd_msw;
    + unsigned short z_fwd_lsw;
    + unsigned short x_up_msw;
    + unsigned short x_up_lsw;
    + unsigned short y_up_msw;
    + unsigned short y_up_lsw;
    + unsigned short z_up_msw;
    + unsigned short z_up_lsw;
    + unsigned short x_vel_lis_msw;
    + unsigned short x_vel_lis_lsw;
    + unsigned short y_vel_lis_msw;
    + unsigned short y_vel_lis_lsw;
    + unsigned short z_vel_lis_msw;
    + unsigned short z_vel_lis_lsw;
    + unsigned short threed_enable_flag;
    + unsigned short volume;
    + unsigned short x_pos_source_msw;
    + unsigned short x_pos_source_lsw;
    + unsigned short y_pos_source_msw;
    + unsigned short y_pos_source_lsw;
    + unsigned short z_pos_source_msw;
    + unsigned short z_pos_source_lsw;
    + unsigned short max_dist_0_msw;
    + unsigned short max_dist_0_lsw;
    + unsigned short min_dist_0_msw;
    + unsigned short min_dist_0_lsw;
    + unsigned short roll_off_factor;
    + unsigned short mute_after_max_flag;
    + unsigned short x_vel_source_msw;
    + unsigned short x_vel_source_lsw;
    + unsigned short y_vel_source_msw;
    + unsigned short y_vel_source_lsw;
    + unsigned short z_vel_source_msw;
    + unsigned short z_vel_source_lsw;
    +} __attribute__((packed)) audpp_msg_qafx_pos;
    +
    +/*
    + * MSG to provide AVSYNC feedback from DSP to ARM
    + */
    +
    +#define AUDPP_MSG_AVSYNC_MSG 0x0005
    +#define AUDPP_MSG_AVSYNC_MSG_LEN \
    + sizeof(audpp_msg_avsync_msg)
    +
    +typedef struct {
    + unsigned short active_flag;
    + unsigned short num_samples_counter0_HSW;
    + unsigned short num_samples_counter0_MSW;
    + unsigned short num_samples_counter0_LSW;
    + unsigned short num_bytes_counter0_HSW;
    + unsigned short num_bytes_counter0_MSW;
    + unsigned short num_bytes_counter0_LSW;
    + unsigned short samp_freq_obj_0;
    + unsigned short samp_freq_obj_1;
    + unsigned short samp_freq_obj_2;
    + unsigned short samp_freq_obj_3;
    + unsigned short samp_freq_obj_4;
    + unsigned short samp_freq_obj_5;
    + unsigned short samp_freq_obj_6;
    + unsigned short samp_freq_obj_7;
    + unsigned short samp_freq_obj_8;
    + unsigned short samp_freq_obj_9;
    + unsigned short samp_freq_obj_10;
    + unsigned short samp_freq_obj_11;
    + unsigned short samp_freq_obj_12;
    + unsigned short samp_freq_obj_13;
    + unsigned short samp_freq_obj_14;
    + unsigned short samp_freq_obj_15;
    + unsigned short num_samples_counter4_HSW;
    + unsigned short num_samples_counter4_MSW;
    + unsigned short num_samples_counter4_LSW;
    + unsigned short num_bytes_counter4_HSW;
    + unsigned short num_bytes_counter4_MSW;
    + unsigned short num_bytes_counter4_LSW;
    +} __attribute__((packed)) audpp_msg_avsync_msg;
    +
    +/*
    + * MSG to provide PCM DMA Missed feedback from the DSP to ARM
    + */
    +
    +#define AUDPP_MSG_PCMDMAMISSED 0x0006
    +#define AUDPP_MSG_PCMDMAMISSED_LEN \
    + sizeof(audpp_msg_pcmdmamissed);
    +
    +typedef struct{
    + /*
    + ** Bit 0 0 = PCM DMA not missed for object 0
    + ** 1 = PCM DMA missed for object0
    + ** Bit 1 0 = PCM DMA not missed for object 1
    + ** 1 = PCM DMA missed for object1
    + ** Bit 2 0 = PCM DMA not missed for object 2
    + ** 1 = PCM DMA missed for object2
    + ** Bit 3 0 = PCM DMA not missed for object 3
    + ** 1 = PCM DMA missed for object3
    + ** Bit 4 0 = PCM DMA not missed for object 4
    + ** 1 = PCM DMA missed for object4
    + */
    + unsigned short pcmdmamissed;
    +} __attribute__((packed)) audpp_msg_pcmdmamissed;
    +
    +/*
    + * MSG to AUDPP enable or disable feedback form DSP to ARM
    + */
    +
    +#define AUDPP_MSG_CFG_MSG 0x0007
    +#define AUDPP_MSG_CFG_MSG_LEN \
    + sizeof(audpp_msg_cfg_msg)
    +
    +#define AUDPP_MSG_ENA_ENA 0xFFFF
    +#define AUDPP_MSG_ENA_DIS 0x0000
    +
    +typedef struct{
    + /* Enabled - 0xffff
    + ** Disabled - 0
    + */
    + unsigned short enabled;
    +} __attribute__((packed)) audpp_msg_cfg_msg;
    +
    +/*
    + * MSG to communicate the reverb per object volume
    + */
    +
    +#define AUDPP_MSG_QREVERB_VOLUME 0x0008
    +#define AUDPP_MSG_QREVERB_VOLUME_LEN \
    + sizeof(audpp_msg_qreverb_volume)
    +
    +
    +typedef struct {
    + unsigned short obj_0_gain;
    + unsigned short obj_1_gain;
    + unsigned short obj_2_gain;
    + unsigned short obj_3_gain;
    + unsigned short obj_4_gain;
    + unsigned short hpcm_obj_volume;
    +} __attribute__((packed)) audpp_msg_qreverb_volume;
    +
    +#define AUDPP_MSG_ROUTING_ACK 0x0009
    +#define AUDPP_MSG_ROUTING_ACK_LEN \
    + sizeof(struct audpp_msg_routing_ack)
    +
    +struct audpp_msg_routing_ack {
    + unsigned short dec_id;
    + unsigned short routing_mode;
    +} __attribute__((packed));
    +
    +#define AUDPP_MSG_FLUSH_ACK 0x000A
    +
    +#endif /* QDSP5AUDPPMSG_H */
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audpreproccmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audpreproccmdi.h
    new file mode 100644
    index 0000000..cd9d590
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audpreproccmdi.h
    @@ -0,0 +1,256 @@
    +#ifndef QDSP5AUDPREPROCCMDI_H
    +#define QDSP5AUDPREPROCCMDI_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + A U D I O P R E P R O C E S S I N G I N T E R N A L C O M M A N D S
    +
    +GENERAL DESCRIPTION
    + This file contains defintions of format blocks of commands
    + that are accepted by AUDPREPROC Task
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    +$Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audpreproccmdi.h#2 $
    +
    +===========================================================================*/
    +
    +/*
    + * AUDIOPREPROC COMMANDS:
    + * ARM uses uPAudPreProcCmdQueue to communicate with AUDPREPROCTASK
    + * Location : MEMB
    + * Buffer size : 51
    + * Number of buffers in a queue : 3
    + */
    +
    +/*
    + * Command to configure the parameters of AGC
    + */
    +
    +#define AUDPREPROC_CMD_CFG_AGC_PARAMS 0x0000
    +#define AUDPREPROC_CMD_CFG_AGC_PARAMS_LEN \
    + sizeof(audpreproc_cmd_cfg_agc_params)
    +
    +#define AUDPREPROC_CMD_TX_AGC_PARAM_MASK_COMP_SLOPE 0x0009
    +#define AUDPREPROC_CMD_TX_AGC_PARAM_MASK_COMP_TH 0x000A
    +#define AUDPREPROC_CMD_TX_AGC_PARAM_MASK_EXP_SLOPE 0x000B
    +#define AUDPREPROC_CMD_TX_AGC_PARAM_MASK_EXP_TH 0x000C
    +#define AUDPREPROC_CMD_TX_AGC_PARAM_MASK_COMP_AIG_FLAG 0x000D
    +#define AUDPREPROC_CMD_TX_AGC_PARAM_MASK_COMP_STATIC_GAIN 0x000E
    +#define AUDPREPROC_CMD_TX_AGC_PARAM_MASK_TX_AGC_ENA_FLAG 0x000F
    +
    +#define AUDPREPROC_CMD_TX_AGC_ENA_FLAG_ENA -1
    +#define AUDPREPROC_CMD_TX_AGC_ENA_FLAG_DIS 0x0000
    +
    +#define AUDPREPROC_CMD_ADP_GAIN_FLAG_ENA_ADP_GAIN -1
    +#define AUDPREPROC_CMD_ADP_GAIN_FLAG_ENA_STATIC_GAIN 0x0000
    +
    +#define AUDPREPROC_CMD_PARAM_MASK_RMS_TAY 0x0004
    +#define AUDPREPROC_CMD_PARAM_MASK_RELEASEK 0x0005
    +#define AUDPREPROC_CMD_PARAM_MASK_DELAY 0x0006
    +#define AUDPREPROC_CMD_PARAM_MASK_ATTACKK 0x0007
    +#define AUDPREPROC_CMD_PARAM_MASK_LEAKRATE_SLOW 0x0008
    +#define AUDPREPROC_CMD_PARAM_MASK_LEAKRATE_FAST 0x0009
    +#define AUDPREPROC_CMD_PARAM_MASK_AIG_RELEASEK 0x000A
    +#define AUDPREPROC_CMD_PARAM_MASK_AIG_MIN 0x000B
    +#define AUDPREPROC_CMD_PARAM_MASK_AIG_MAX 0x000C
    +#define AUDPREPROC_CMD_PARAM_MASK_LEAK_UP 0x000D
    +#define AUDPREPROC_CMD_PARAM_MASK_LEAK_DOWN 0x000E
    +#define AUDPREPROC_CMD_PARAM_MASK_AIG_ATTACKK 0x000F
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short tx_agc_param_mask;
    + unsigned short tx_agc_enable_flag;
    + unsigned short static_gain;
    + signed short adaptive_gain_flag;
    + unsigned short expander_th;
    + unsigned short expander_slope;
    + unsigned short compressor_th;
    + unsigned short compressor_slope;
    + unsigned short param_mask;
    + unsigned short aig_attackk;
    + unsigned short aig_leak_down;
    + unsigned short aig_leak_up;
    + unsigned short aig_max;
    + unsigned short aig_min;
    + unsigned short aig_releasek;
    + unsigned short aig_leakrate_fast;
    + unsigned short aig_leakrate_slow;
    + unsigned short attackk_msw;
    + unsigned short attackk_lsw;
    + unsigned short delay;
    + unsigned short releasek_msw;
    + unsigned short releasek_lsw;
    + unsigned short rms_tav;
    +} __attribute__((packed)) audpreproc_cmd_cfg_agc_params;
    +
    +
    +/*
    + * Command to configure the params of Advanved AGC
    + */
    +
    +#define AUDPREPROC_CMD_CFG_AGC_PARAMS_2 0x0001
    +#define AUDPREPROC_CMD_CFG_AGC_PARAMS_2_LEN \
    + sizeof(audpreproc_cmd_cfg_agc_params_2)
    +
    +#define AUDPREPROC_CMD_2_TX_AGC_ENA_FLAG_ENA -1;
    +#define AUDPREPROC_CMD_2_TX_AGC_ENA_FLAG_DIS 0x0000;
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short agc_param_mask;
    + signed short tx_agc_enable_flag;
    + unsigned short comp_static_gain;
    + unsigned short exp_th;
    + unsigned short exp_slope;
    + unsigned short comp_th;
    + unsigned short comp_slope;
    + unsigned short comp_rms_tav;
    + unsigned short comp_samp_mask;
    + unsigned short comp_attackk_msw;
    + unsigned short comp_attackk_lsw;
    + unsigned short comp_releasek_msw;
    + unsigned short comp_releasek_lsw;
    + unsigned short comp_delay;
    + unsigned short comp_makeup_gain;
    +} __attribute__((packed)) audpreproc_cmd_cfg_agc_params_2;
    +
    +/*
    + * Command to configure params for ns
    + */
    +
    +#define AUDPREPROC_CMD_CFG_NS_PARAMS 0x0002
    +#define AUDPREPROC_CMD_CFG_NS_PARAMS_LEN \
    + sizeof(audpreproc_cmd_cfg_ns_params)
    +
    +#define AUDPREPROC_CMD_EC_MODE_NEW_NLMS_ENA 0x0001
    +#define AUDPREPROC_CMD_EC_MODE_NEW_NLMS_DIS 0x0000
    +#define AUDPREPROC_CMD_EC_MODE_NEW_DES_ENA 0x0002
    +#define AUDPREPROC_CMD_EC_MODE_NEW_DES_DIS 0x0000
    +#define AUDPREPROC_CMD_EC_MODE_NEW_NS_ENA 0x0004
    +#define AUDPREPROC_CMD_EC_MODE_NEW_NS_DIS 0x0000
    +#define AUDPREPROC_CMD_EC_MODE_NEW_CNI_ENA 0x0008
    +#define AUDPREPROC_CMD_EC_MODE_NEW_CNI_DIS 0x0000
    +
    +#define AUDPREPROC_CMD_EC_MODE_NEW_NLES_ENA 0x0010
    +#define AUDPREPROC_CMD_EC_MODE_NEW_NLES_DIS 0x0000
    +#define AUDPREPROC_CMD_EC_MODE_NEW_HB_ENA 0x0020
    +#define AUDPREPROC_CMD_EC_MODE_NEW_HB_DIS 0x0000
    +#define AUDPREPROC_CMD_EC_MODE_NEW_VA_ENA 0x0040
    +#define AUDPREPROC_CMD_EC_MODE_NEW_VA_DIS 0x0000
    +#define AUDPREPROC_CMD_EC_MODE_NEW_PCD_ENA 0x0080
    +#define AUDPREPROC_CMD_EC_MODE_NEW_PCD_DIS 0x0000
    +#define AUDPREPROC_CMD_EC_MODE_NEW_FEHI_ENA 0x0100
    +#define AUDPREPROC_CMD_EC_MODE_NEW_FEHI_DIS 0x0000
    +#define AUDPREPROC_CMD_EC_MODE_NEW_NEHI_ENA 0x0200
    +#define AUDPREPROC_CMD_EC_MODE_NEW_NEHI_DIS 0x0000
    +#define AUDPREPROC_CMD_EC_MODE_NEW_NLPP_ENA 0x0400
    +#define AUDPREPROC_CMD_EC_MODE_NEW_NLPP_DIS 0x0000
    +#define AUDPREPROC_CMD_EC_MODE_NEW_FNE_ENA 0x0800
    +#define AUDPREPROC_CMD_EC_MODE_NEW_FNE_DIS 0x0000
    +#define AUDPREPROC_CMD_EC_MODE_NEW_PRENLMS_ENA 0x1000
    +#define AUDPREPROC_CMD_EC_MODE_NEW_PRENLMS_DIS 0x0000
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short ec_mode_new;
    + unsigned short dens_gamma_n;
    + unsigned short dens_nfe_block_size;
    + unsigned short dens_limit_ns;
    + unsigned short dens_limit_ns_d;
    + unsigned short wb_gamma_e;
    + unsigned short wb_gamma_n;
    +} __attribute__((packed)) audpreproc_cmd_cfg_ns_params;
    +
    +/*
    + * Command to configure parameters for IIR tuning filter
    + */
    +
    +#define AUDPREPROC_CMD_CFG_IIR_TUNING_FILTER_PARAMS 0x0003
    +#define AUDPREPROC_CMD_CFG_IIR_TUNING_FILTER_PARAMS_LEN \
    + sizeof(audpreproc_cmd_cfg_iir_tuning_filter_params)
    +
    +#define AUDPREPROC_CMD_IIR_ACTIVE_FLAG_DIS 0x0000
    +#define AUDPREPROC_CMD_IIR_ACTIVE_FLAG_ENA 0x0001
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short active_flag;
    + unsigned short num_bands;
    + unsigned short numerator_coeff_b0_filter0_lsw;
    + unsigned short numerator_coeff_b0_filter0_msw;
    + unsigned short numerator_coeff_b1_filter0_lsw;
    + unsigned short numerator_coeff_b1_filter0_msw;
    + unsigned short numerator_coeff_b2_filter0_lsw;
    + unsigned short numerator_coeff_b2_filter0_msw;
    + unsigned short numerator_coeff_b0_filter1_lsw;
    + unsigned short numerator_coeff_b0_filter1_msw;
    + unsigned short numerator_coeff_b1_filter1_lsw;
    + unsigned short numerator_coeff_b1_filter1_msw;
    + unsigned short numerator_coeff_b2_filter1_lsw;
    + unsigned short numerator_coeff_b2_filter1_msw;
    + unsigned short numerator_coeff_b0_filter2_lsw;
    + unsigned short numerator_coeff_b0_filter2_msw;
    + unsigned short numerator_coeff_b1_filter2_lsw;
    + unsigned short numerator_coeff_b1_filter2_msw;
    + unsigned short numerator_coeff_b2_filter2_lsw;
    + unsigned short numerator_coeff_b2_filter2_msw;
    + unsigned short numerator_coeff_b0_filter3_lsw;
    + unsigned short numerator_coeff_b0_filter3_msw;
    + unsigned short numerator_coeff_b1_filter3_lsw;
    + unsigned short numerator_coeff_b1_filter3_msw;
    + unsigned short numerator_coeff_b2_filter3_lsw;
    + unsigned short numerator_coeff_b2_filter3_msw;
    + unsigned short denominator_coeff_a0_filter0_lsw;
    + unsigned short denominator_coeff_a0_filter0_msw;
    + unsigned short denominator_coeff_a1_filter0_lsw;
    + unsigned short denominator_coeff_a1_filter0_msw;
    + unsigned short denominator_coeff_a0_filter1_lsw;
    + unsigned short denominator_coeff_a0_filter1_msw;
    + unsigned short denominator_coeff_a1_filter1_lsw;
    + unsigned short denominator_coeff_a1_filter1_msw;
    + unsigned short denominator_coeff_a0_filter2_lsw;
    + unsigned short denominator_coeff_a0_filter2_msw;
    + unsigned short denominator_coeff_a1_filter2_lsw;
    + unsigned short denominator_coeff_a1_filter2_msw;
    + unsigned short denominator_coeff_a0_filter3_lsw;
    + unsigned short denominator_coeff_a0_filter3_msw;
    + unsigned short denominator_coeff_a1_filter3_lsw;
    + unsigned short denominator_coeff_a1_filter3_msw;
    +
    + unsigned short shift_factor_filter0;
    + unsigned short shift_factor_filter1;
    + unsigned short shift_factor_filter2;
    + unsigned short shift_factor_filter3;
    +
    + unsigned short channel_selected0;
    + unsigned short channel_selected1;
    + unsigned short channel_selected2;
    + unsigned short channel_selected3;
    +} __attribute__((packed))audpreproc_cmd_cfg_iir_tuning_filter_params;
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audpreprocmsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audpreprocmsg.h
    new file mode 100644
    index 0000000..9187f45
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audpreprocmsg.h
    @@ -0,0 +1,85 @@
    +#ifndef QDSP5AUDPREPROCMSG_H
    +#define QDSP5AUDPREPROCMSG_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + A U D I O P R E P R O C E S S I N G M E S S A G E S
    +
    +GENERAL DESCRIPTION
    + This file contains defintions of format blocks of messages
    + that are rcvd by AUDPREPROC Task
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    + $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audpreprocmsg.h#3 $
    +
    +===========================================================================*/
    +
    +/*
    + * ADSPREPROCTASK Messages
    + * AUDPREPROCTASK uses audPreProcUpRlist to communicate with ARM
    + * Location : MEMA
    + * Message Length : 2
    + */
    +
    +/*
    + * Message to indicate particular feature has been enabled or disabled
    + */
    +
    +
    +#define AUDPREPROC_MSG_CMD_CFG_DONE_MSG 0x0000
    +#define AUDPREPROC_MSG_CMD_CFG_DONE_MSG_LEN \
    + sizeof(audpreproc_msg_cmd_cfg_done_msg)
    +
    +#define AUDPREPROC_MSG_TYPE_AGC 0x0000
    +#define AUDPREPROC_MSG_TYPE_NOISE_REDUCTION 0x0001
    +#define AUDPREPROC_MSG_TYPE_IIR_FILTER 0x0002
    +
    +
    +#define AUDPREPROC_MSG_STATUS_FLAG_ENA -1
    +#define AUDPREPROC_MSG_STATUS_FLAG_DIS 0x0000
    +
    +typedef struct {
    + unsigned short type;
    + signed short status_flag;
    +} __attribute__((packed)) audpreproc_msg_cmd_cfg_done_msg;
    +
    +
    +/*
    + * Message to indicate particular feature has selected for wrong samp freq
    + */
    +
    +#define AUDPREPROC_MSG_ERROR_MSG_ID 0x0001
    +#define AUDPREPROC_MSG_ERROR_MSG_ID_LEN \
    + sizeof(audpreproc_msg_error_msg_id)
    +
    +#define AUDPREPROC_MSG_ERR_INDEX_NS 0x0000
    +
    +typedef struct {
    + unsigned short err_index;
    +} __attribute__((packed)) audpreproc_msg_error_msg_id;
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audreccmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audreccmdi.h
    new file mode 100644
    index 0000000..e88bd5d
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audreccmdi.h
    @@ -0,0 +1,176 @@
    +#ifndef QDSP5AUDRECCMDI_H
    +#define QDSP5AUDRECCMDI_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + A U D I O R E C O R D I N T E R N A L C O M M A N D S
    +
    +GENERAL DESCRIPTION
    + This file contains defintions of format blocks of commands
    + that are accepted by AUDREC Task
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    + $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audreccmdi.h#3 $
    +
    +============================================================================*/
    +
    +/*
    + * AUDRECTASK COMMANDS
    + * ARM uses 2 queues to communicate with the AUDRECTASK
    + * 1.uPAudRecCmdQueue
    + * Location :MEMC
    + * Buffer Size : 8
    + * No of Buffers in a queue : 3
    + * 2.audRecUpBitStreamQueue
    + * Location : MEMC
    + * Buffer Size : 4
    + * No of buffers in a queue : 2
    + */
    +
    +/*
    + * Commands on uPAudRecCmdQueue
    + */
    +
    +/*
    + * Command to initiate and terminate the audio recording section
    + */
    +
    +#define AUDREC_CMD_CFG 0x0000
    +#define AUDREC_CMD_CFG_LEN sizeof(audrec_cmd_cfg)
    +
    +#define AUDREC_CMD_TYPE_0_INDEX_WAV 0x0000
    +#define AUDREC_CMD_TYPE_0_INDEX_AAC 0x0001
    +
    +#define AUDREC_CMD_TYPE_0_ENA 0x4000
    +#define AUDREC_CMD_TYPE_0_DIS 0x0000
    +
    +#define AUDREC_CMD_TYPE_0_NOUPDATE 0x0000
    +#define AUDREC_CMD_TYPE_0_UPDATE 0x8000
    +
    +#define AUDREC_CMD_TYPE_1_INDEX_SBC 0x0002
    +
    +#define AUDREC_CMD_TYPE_1_ENA 0x4000
    +#define AUDREC_CMD_TYPE_1_DIS 0x0000
    +
    +#define AUDREC_CMD_TYPE_1_NOUPDATE 0x0000
    +#define AUDREC_CMD_TYPE_1_UPDATE 0x8000
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short type_0;
    + unsigned short type_1;
    +} __attribute__((packed)) audrec_cmd_cfg;
    +
    +
    +/*
    + * Command to configure the recording parameters for RecType0(AAC/WAV) encoder
    + */
    +
    +#define AUDREC_CMD_AREC0PARAM_CFG 0x0001
    +#define AUDREC_CMD_AREC0PARAM_CFG_LEN \
    + sizeof(audrec_cmd_arec0param_cfg)
    +
    +#define AUDREC_CMD_SAMP_RATE_INDX_8000 0x000B
    +#define AUDREC_CMD_SAMP_RATE_INDX_11025 0x000A
    +#define AUDREC_CMD_SAMP_RATE_INDX_12000 0x0009
    +#define AUDREC_CMD_SAMP_RATE_INDX_16000 0x0008
    +#define AUDREC_CMD_SAMP_RATE_INDX_22050 0x0007
    +#define AUDREC_CMD_SAMP_RATE_INDX_24000 0x0006
    +#define AUDREC_CMD_SAMP_RATE_INDX_32000 0x0005
    +#define AUDREC_CMD_SAMP_RATE_INDX_44100 0x0004
    +#define AUDREC_CMD_SAMP_RATE_INDX_48000 0x0003
    +
    +#define AUDREC_CMD_STEREO_MODE_MONO 0x0000
    +#define AUDREC_CMD_STEREO_MODE_STEREO 0x0001
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short ptr_to_extpkt_buffer_msw;
    + unsigned short ptr_to_extpkt_buffer_lsw;
    + unsigned short buf_len;
    + unsigned short samp_rate_index;
    + unsigned short stereo_mode;
    + unsigned short rec_quality;
    +} __attribute__((packed)) audrec_cmd_arec0param_cfg;
    +
    +/*
    + * Command to configure the recording parameters for RecType1(SBC) encoder
    + */
    +
    +#define AUDREC_CMD_AREC1PARAM_CFG 0x0002
    +#define AUDREC_CMD_AREC1PARAM_CFG_LEN \
    + sizeof(audrec_cmd_arec1param_cfg)
    +
    +#define AUDREC_CMD_PARAM_BUF_BLOCKS_4 0x0000
    +#define AUDREC_CMD_PARAM_BUF_BLOCKS_8 0x0001
    +#define AUDREC_CMD_PARAM_BUF_BLOCKS_12 0x0002
    +#define AUDREC_CMD_PARAM_BUF_BLOCKS_16 0x0003
    +
    +#define AUDREC_CMD_PARAM_BUF_SUB_BANDS_8 0x0010
    +#define AUDREC_CMD_PARAM_BUF_MODE_MONO 0x0000
    +#define AUDREC_CMD_PARAM_BUF_MODE_DUAL 0x0040
    +#define AUDREC_CMD_PARAM_BUF_MODE_STEREO 0x0050
    +#define AUDREC_CMD_PARAM_BUF_MODE_JSTEREO 0x0060
    +#define AUDREC_CMD_PARAM_BUF_LOUDNESS 0x0000
    +#define AUDREC_CMD_PARAM_BUF_SNR 0x0100
    +#define AUDREC_CMD_PARAM_BUF_BASIC_VER 0x0000
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short ptr_to_extpkt_buffer_msw;
    + unsigned short ptr_to_extpkt_buffer_lsw;
    + unsigned short buf_len;
    + unsigned short param_buf;
    + unsigned short bit_rate_0;
    + unsigned short bit_rate_1;
    +} __attribute__((packed)) audrec_cmd_arec1param_cfg;
    +
    +
    +/*
    + * Commands on audRecUpBitStreamQueue
    + */
    +
    +/*
    + * Command to indicate the current packet read count
    + */
    +
    +#define AUDREC_CMD_PACKET_EXT_PTR 0x0000
    +#define AUDREC_CMD_PACKET_EXT_PTR_LEN \
    + sizeof(audrec_cmd_packet_ext_ptr)
    +
    +#define AUDREC_CMD_TYPE_0 0x0000
    +#define AUDREC_CMD_TYPE_1 0x0001
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short type;
    + unsigned short curr_rec_count_msw;
    + unsigned short curr_rec_count_lsw;
    +} __attribute__((packed)) audrec_cmd_packet_ext_ptr;
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audrecmsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audrecmsg.h
    new file mode 100644
    index 0000000..bb6eb50
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audrecmsg.h
    @@ -0,0 +1,127 @@
    +#ifndef QDSP5AUDRECMSGI_H
    +#define QDSP5AUDRECMSGI_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + A U D I O R E C O R D M E S S A G E S
    +
    +GENERAL DESCRIPTION
    + This file contains defintions of format blocks of messages
    + that are sent by AUDREC Task
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    + $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audrecmsg.h#3 $
    +
    +============================================================================*/
    +
    +/*
    + * AUDRECTASK MESSAGES
    + * AUDRECTASK uses audRecUpRlist to communicate with ARM
    + * Location : MEMC
    + * Buffer size : 4
    + * No of buffers in a queue : 2
    + */
    +
    +/*
    + * Message to notify that config command is done
    + */
    +
    +#define AUDREC_MSG_CMD_CFG_DONE_MSG 0x0002
    +#define AUDREC_MSG_CMD_CFG_DONE_MSG_LEN \
    + sizeof(audrec_msg_cmd_cfg_done_msg)
    +
    +
    +#define AUDREC_MSG_CFG_DONE_TYPE_0_ENA 0x4000
    +#define AUDREC_MSG_CFG_DONE_TYPE_0_DIS 0x0000
    +
    +#define AUDREC_MSG_CFG_DONE_TYPE_0_NO_UPDATE 0x0000
    +#define AUDREC_MSG_CFG_DONE_TYPE_0_UPDATE 0x8000
    +
    +#define AUDREC_MSG_CFG_DONE_TYPE_1_ENA 0x4000
    +#define AUDREC_MSG_CFG_DONE_TYPE_1_DIS 0x0000
    +
    +#define AUDREC_MSG_CFG_DONE_TYPE_1_NO_UPDATE 0x0000
    +#define AUDREC_MSG_CFG_DONE_TYPE_1_UPDATE 0x8000
    +
    +typedef struct {
    + unsigned short type_0;
    + unsigned short type_1;
    +} __attribute__((packed))audrec_msg_cmd_cfg_done_msg;
    +
    +
    +/*
    + * Message to notify arec0/1 cfg done and recording params revd by task
    + */
    +
    +#define AUDREC_MSG_CMD_AREC_PARAM_CFG_DONE_MSG 0x0003
    +#define AUDREC_MSG_CMD_AREC_PARAM_CFG_DONE_MSG_LEN \
    + sizeof(audrec_msg_cmd_arec_param_cfg_done_msg)
    +
    +#define AUDREC_MSG_AREC_PARAM_TYPE_0 0x0000
    +#define AUDREC_MSG_AREC_PARAM_TYPE_1 0x0001
    +
    +typedef struct {
    + unsigned short type;
    +} __attribute__((packed))audrec_msg_cmd_arec_param_cfg_done_msg;
    +
    +
    +/*
    + * Message to notify no more buffers are available in ext mem to DME
    + */
    +
    +#define AUDREC_MSG_FATAL_ERR_MSG 0x0004
    +#define AUDREC_MSG_FATAL_ERR_MSG_LEN \
    + sizeof(audrec_msg_fatal_err_msg)
    +
    +#define AUDREC_MSG_FATAL_ERR_TYPE_0 0x0000
    +#define AUDREC_MSG_FATAL_ERR_TYPE_1 0x0001
    +
    +typedef struct {
    + unsigned short type;
    +} __attribute__((packed))audrec_msg_fatal_err_msg;
    +
    +/*
    + * Message to notify DME deliverd the encoded pkt to ext pkt buffer
    + */
    +
    +#define AUDREC_MSG_PACKET_READY_MSG 0x0005
    +#define AUDREC_MSG_PACKET_READY_MSG_LEN \
    + sizeof(audrec_msg_packet_ready_msg)
    +
    +#define AUDREC_MSG_PACKET_READY_TYPE_0 0x0000
    +#define AUDREC_MSG_PACKET_READY_TYPE_1 0x0001
    +
    +typedef struct {
    + unsigned short type;
    + unsigned short pkt_counter_msw;
    + unsigned short pkt_counter_lsw;
    + unsigned short pkt_read_cnt_msw;
    + unsigned short pkt_read_cnt_lsw;
    +} __attribute__((packed))audrec_msg_packet_ready_msg;
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5jpegcmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5jpegcmdi.h
    new file mode 100644
    index 0000000..d8170f0
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5jpegcmdi.h
    @@ -0,0 +1,376 @@
    +#ifndef QDSP5VIDJPEGCMDI_H
    +#define QDSP5VIDJPEGCMDI_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + J P E G I N T E R N A L C O M M A N D S
    +
    +GENERAL DESCRIPTION
    + This file contains defintions of format blocks of commands
    + that are accepted by JPEG Task
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5jpegcmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $
    +Revision History:
    +when who what, where, why
    +-------- --- ----------------------------------------------------------
    +06/09/08 sv initial version
    +===========================================================================*/
    +
    +/*
    + * ARM to JPEG configuration commands are passed through the
    + * uPJpegCfgCmdQueue
    + */
    +
    +/*
    + * Command to configure JPEG Encoder
    + */
    +
    +#define JPEG_CMD_ENC_CFG 0x0000
    +#define JPEG_CMD_ENC_CFG_LEN sizeof(jpeg_cmd_enc_cfg)
    +
    +#define JPEG_CMD_ENC_PROCESS_CFG_OP_ROTATION_0 0x0000
    +#define JPEG_CMD_ENC_PROCESS_CFG_OP_ROTATION_90 0x0100
    +#define JPEG_CMD_ENC_PROCESS_CFG_OP_ROTATION_180 0x0200
    +#define JPEG_CMD_ENC_PROCESS_CFG_OP_ROTATION_270 0x0300
    +#define JPEG_CMD_ENC_PROCESS_CFG_IP_DATA_FORMAT_M 0x0003
    +#define JPEG_CMD_ENC_PROCESS_CFG_IP_DATA_FORMAT_H2V2 0x0000
    +#define JPEG_CMD_ENC_PROCESS_CFG_IP_DATA_FORMAT_H2V1 0x0001
    +#define JPEG_CMD_ENC_PROCESS_CFG_IP_DATA_FORMAT_H1V2 0x0002
    +
    +#define JPEG_CMD_IP_SIZE_CFG_LUMA_HEIGHT_M 0x0000FFFF
    +#define JPEG_CMD_IP_SIZE_CFG_LUMA_WIDTH_M 0xFFFF0000
    +#define JPEG_CMD_ENC_UPSAMP_IP_SIZE_CFG_ENA 0x0001
    +#define JPEG_CMD_ENC_UPSAMP_IP_SIZE_CFG_DIS 0x0000
    +
    +#define JPEG_CMD_FRAG_SIZE_LUMA_HEIGHT_M 0xFFFF
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int process_cfg;
    + unsigned int ip_size_cfg;
    + unsigned int op_size_cfg;
    + unsigned int frag_cfg;
    + unsigned int frag_cfg_part[16];
    +
    + unsigned int part_num;
    +
    + unsigned int op_buf_0_cfg_part1;
    + unsigned int op_buf_0_cfg_part2;
    + unsigned int op_buf_1_cfg_part1;
    + unsigned int op_buf_1_cfg_part2;
    +
    + unsigned int luma_qunt_table[32];
    + unsigned int chroma_qunt_table[32];
    +
    + unsigned int upsamp_ip_size_cfg;
    + unsigned int upsamp_ip_frame_off;
    + unsigned int upsamp_pp_filter_coeff[64];
    +} __attribute__((packed)) jpeg_cmd_enc_cfg;
    +
    +/*
    + * Command to configure JPEG Decoder
    + */
    +
    +#define JPEG_CMD_DEC_CFG 0x0001
    +#define JPEG_CMD_DEC_CFG_LEN sizeof(jpeg_cmd_dec_cfg)
    +
    +#define JPEG_CMD_DEC_OP_DATA_FORMAT_M 0x0001
    +#define JPEG_CMD_DEC_OP_DATA_FORMAT_H2V2 0x0000
    +#define JPEG_CMD_DEC_OP_DATA_FORMAT_H2V1 0x0001
    +
    +#define JPEG_CMD_DEC_OP_DATA_FORMAT_SCALE_FACTOR_8 0x000000
    +#define JPEG_CMD_DEC_OP_DATA_FORMAT_SCALE_FACTOR_4 0x010000
    +#define JPEG_CMD_DEC_OP_DATA_FORMAT_SCALE_FACTOR_2 0x020000
    +#define JPEG_CMD_DEC_OP_DATA_FORMAT_SCALE_FACTOR_1 0x030000
    +
    +#define JPEG_CMD_DEC_IP_STREAM_BUF_CFG_PART3_NOT_FINAL 0x0000
    +#define JPEG_CMD_DEC_IP_STREAM_BUF_CFG_PART3_FINAL 0x0001
    +
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int img_dimension_cfg;
    + unsigned int op_data_format;
    + unsigned int restart_interval;
    + unsigned int ip_buf_partition_num;
    + unsigned int ip_stream_buf_cfg_part1;
    + unsigned int ip_stream_buf_cfg_part2;
    + unsigned int ip_stream_buf_cfg_part3;
    + unsigned int op_stream_buf_0_cfg_part1;
    + unsigned int op_stream_buf_0_cfg_part2;
    + unsigned int op_stream_buf_0_cfg_part3;
    + unsigned int op_stream_buf_1_cfg_part1;
    + unsigned int op_stream_buf_1_cfg_part2;
    + unsigned int op_stream_buf_1_cfg_part3;
    + unsigned int luma_qunt_table_0_3;
    + unsigned int luma_qunt_table_4_7;
    + unsigned int luma_qunt_table_8_11;
    + unsigned int luma_qunt_table_12_15;
    + unsigned int luma_qunt_table_16_19;
    + unsigned int luma_qunt_table_20_23;
    + unsigned int luma_qunt_table_24_27;
    + unsigned int luma_qunt_table_28_31;
    + unsigned int luma_qunt_table_32_35;
    + unsigned int luma_qunt_table_36_39;
    + unsigned int luma_qunt_table_40_43;
    + unsigned int luma_qunt_table_44_47;
    + unsigned int luma_qunt_table_48_51;
    + unsigned int luma_qunt_table_52_55;
    + unsigned int luma_qunt_table_56_59;
    + unsigned int luma_qunt_table_60_63;
    + unsigned int chroma_qunt_table_0_3;
    + unsigned int chroma_qunt_table_4_7;
    + unsigned int chroma_qunt_table_8_11;
    + unsigned int chroma_qunt_table_12_15;
    + unsigned int chroma_qunt_table_16_19;
    + unsigned int chroma_qunt_table_20_23;
    + unsigned int chroma_qunt_table_24_27;
    + unsigned int chroma_qunt_table_28_31;
    + unsigned int chroma_qunt_table_32_35;
    + unsigned int chroma_qunt_table_36_39;
    + unsigned int chroma_qunt_table_40_43;
    + unsigned int chroma_qunt_table_44_47;
    + unsigned int chroma_qunt_table_48_51;
    + unsigned int chroma_qunt_table_52_55;
    + unsigned int chroma_qunt_table_56_59;
    + unsigned int chroma_qunt_table_60_63;
    + unsigned int luma_dc_hm_code_cnt_table_0_3;
    + unsigned int luma_dc_hm_code_cnt_table_4_7;
    + unsigned int luma_dc_hm_code_cnt_table_8_11;
    + unsigned int luma_dc_hm_code_cnt_table_12_15;
    + unsigned int luma_dc_hm_code_val_table_0_3;
    + unsigned int luma_dc_hm_code_val_table_4_7;
    + unsigned int luma_dc_hm_code_val_table_8_11;
    + unsigned int chroma_dc_hm_code_cnt_table_0_3;
    + unsigned int chroma_dc_hm_code_cnt_table_4_7;
    + unsigned int chroma_dc_hm_code_cnt_table_8_11;
    + unsigned int chroma_dc_hm_code_cnt_table_12_15;
    + unsigned int chroma_dc_hm_code_val_table_0_3;
    + unsigned int chroma_dc_hm_code_val_table_4_7;
    + unsigned int chroma_dc_hm_code_val_table_8_11;
    + unsigned int luma_ac_hm_code_cnt_table_0_3;
    + unsigned int luma_ac_hm_code_cnt_table_4_7;
    + unsigned int luma_ac_hm_code_cnt_table_8_11;
    + unsigned int luma_ac_hm_code_cnt_table_12_15;
    + unsigned int luma_ac_hm_code_val_table_0_3;
    + unsigned int luma_ac_hm_code_val_table_4_7;
    + unsigned int luma_ac_hm_code_val_table_8_11;
    + unsigned int luma_ac_hm_code_val_table_12_15;
    + unsigned int luma_ac_hm_code_val_table_16_19;
    + unsigned int luma_ac_hm_code_val_table_20_23;
    + unsigned int luma_ac_hm_code_val_table_24_27;
    + unsigned int luma_ac_hm_code_val_table_28_31;
    + unsigned int luma_ac_hm_code_val_table_32_35;
    + unsigned int luma_ac_hm_code_val_table_36_39;
    + unsigned int luma_ac_hm_code_val_table_40_43;
    + unsigned int luma_ac_hm_code_val_table_44_47;
    + unsigned int luma_ac_hm_code_val_table_48_51;
    + unsigned int luma_ac_hm_code_val_table_52_55;
    + unsigned int luma_ac_hm_code_val_table_56_59;
    + unsigned int luma_ac_hm_code_val_table_60_63;
    + unsigned int luma_ac_hm_code_val_table_64_67;
    + unsigned int luma_ac_hm_code_val_table_68_71;
    + unsigned int luma_ac_hm_code_val_table_72_75;
    + unsigned int luma_ac_hm_code_val_table_76_79;
    + unsigned int luma_ac_hm_code_val_table_80_83;
    + unsigned int luma_ac_hm_code_val_table_84_87;
    + unsigned int luma_ac_hm_code_val_table_88_91;
    + unsigned int luma_ac_hm_code_val_table_92_95;
    + unsigned int luma_ac_hm_code_val_table_96_99;
    + unsigned int luma_ac_hm_code_val_table_100_103;
    + unsigned int luma_ac_hm_code_val_table_104_107;
    + unsigned int luma_ac_hm_code_val_table_108_111;
    + unsigned int luma_ac_hm_code_val_table_112_115;
    + unsigned int luma_ac_hm_code_val_table_116_119;
    + unsigned int luma_ac_hm_code_val_table_120_123;
    + unsigned int luma_ac_hm_code_val_table_124_127;
    + unsigned int luma_ac_hm_code_val_table_128_131;
    + unsigned int luma_ac_hm_code_val_table_132_135;
    + unsigned int luma_ac_hm_code_val_table_136_139;
    + unsigned int luma_ac_hm_code_val_table_140_143;
    + unsigned int luma_ac_hm_code_val_table_144_147;
    + unsigned int luma_ac_hm_code_val_table_148_151;
    + unsigned int luma_ac_hm_code_val_table_152_155;
    + unsigned int luma_ac_hm_code_val_table_156_159;
    + unsigned int luma_ac_hm_code_val_table_160_161;
    + unsigned int chroma_ac_hm_code_cnt_table_0_3;
    + unsigned int chroma_ac_hm_code_cnt_table_4_7;
    + unsigned int chroma_ac_hm_code_cnt_table_8_11;
    + unsigned int chroma_ac_hm_code_cnt_table_12_15;
    + unsigned int chroma_ac_hm_code_val_table_0_3;
    + unsigned int chroma_ac_hm_code_val_table_4_7;
    + unsigned int chroma_ac_hm_code_val_table_8_11;
    + unsigned int chroma_ac_hm_code_val_table_12_15;
    + unsigned int chroma_ac_hm_code_val_table_16_19;
    + unsigned int chroma_ac_hm_code_val_table_20_23;
    + unsigned int chroma_ac_hm_code_val_table_24_27;
    + unsigned int chroma_ac_hm_code_val_table_28_31;
    + unsigned int chroma_ac_hm_code_val_table_32_35;
    + unsigned int chroma_ac_hm_code_val_table_36_39;
    + unsigned int chroma_ac_hm_code_val_table_40_43;
    + unsigned int chroma_ac_hm_code_val_table_44_47;
    + unsigned int chroma_ac_hm_code_val_table_48_51;
    + unsigned int chroma_ac_hm_code_val_table_52_55;
    + unsigned int chroma_ac_hm_code_val_table_56_59;
    + unsigned int chroma_ac_hm_code_val_table_60_63;
    + unsigned int chroma_ac_hm_code_val_table_64_67;
    + unsigned int chroma_ac_hm_code_val_table_68_71;
    + unsigned int chroma_ac_hm_code_val_table_72_75;
    + unsigned int chroma_ac_hm_code_val_table_76_79;
    + unsigned int chroma_ac_hm_code_val_table_80_83;
    + unsigned int chroma_ac_hm_code_val_table_84_87;
    + unsigned int chroma_ac_hm_code_val_table_88_91;
    + unsigned int chroma_ac_hm_code_val_table_92_95;
    + unsigned int chroma_ac_hm_code_val_table_96_99;
    + unsigned int chroma_ac_hm_code_val_table_100_103;
    + unsigned int chroma_ac_hm_code_val_table_104_107;
    + unsigned int chroma_ac_hm_code_val_table_108_111;
    + unsigned int chroma_ac_hm_code_val_table_112_115;
    + unsigned int chroma_ac_hm_code_val_table_116_119;
    + unsigned int chroma_ac_hm_code_val_table_120_123;
    + unsigned int chroma_ac_hm_code_val_table_124_127;
    + unsigned int chroma_ac_hm_code_val_table_128_131;
    + unsigned int chroma_ac_hm_code_val_table_132_135;
    + unsigned int chroma_ac_hm_code_val_table_136_139;
    + unsigned int chroma_ac_hm_code_val_table_140_143;
    + unsigned int chroma_ac_hm_code_val_table_144_147;
    + unsigned int chroma_ac_hm_code_val_table_148_151;
    + unsigned int chroma_ac_hm_code_val_table_152_155;
    + unsigned int chroma_ac_hm_code_val_table_156_159;
    + unsigned int chroma_ac_hm_code_val_table_160_161;
    +} __attribute__((packed)) jpeg_cmd_dec_cfg;
    +
    +
    +/*
    + * ARM to JPEG configuration commands are passed through the
    + * uPJpegActionCmdQueue
    + */
    +
    +/*
    + * Command to start the encode process
    + */
    +
    +#define JPEG_CMD_ENC_ENCODE 0x0000
    +#define JPEG_CMD_ENC_ENCODE_LEN sizeof(jpeg_cmd_enc_encode)
    +
    +
    +typedef struct {
    + unsigned short cmd_id;
    +} __attribute__((packed)) jpeg_cmd_enc_encode;
    +
    +
    +/*
    + * Command to transition from current state of encoder to IDLE state
    + */
    +
    +#define JPEG_CMD_ENC_IDLE 0x0001
    +#define JPEG_CMD_ENC_IDLE_LEN sizeof(jpeg_cmd_enc_idle)
    +
    +
    +typedef struct {
    + unsigned short cmd_id;
    +} __attribute__((packed)) jpeg_cmd_enc_idle;
    +
    +
    +/*
    + * Command to inform the encoder that another buffer is ready
    + */
    +
    +#define JPEG_CMD_ENC_OP_CONSUMED 0x0002
    +#define JPEG_CMD_ENC_OP_CONSUMED_LEN sizeof(jpeg_cmd_enc_op_consumed)
    +
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int op_buf_addr;
    + unsigned int op_buf_size;
    +} __attribute__((packed)) jpeg_cmd_enc_op_consumed;
    +
    +
    +/*
    + * Command to start the decoding process
    + */
    +
    +#define JPEG_CMD_DEC_DECODE 0x0003
    +#define JPEG_CMD_DEC_DECODE_LEN sizeof(jpeg_cmd_dec_decode)
    +
    +
    +typedef struct {
    + unsigned short cmd_id;
    +} __attribute__((packed)) jpeg_cmd_dec_decode;
    +
    +
    +/*
    + * Command to transition from the current state of decoder to IDLE
    + */
    +
    +#define JPEG_CMD_DEC_IDLE 0x0004
    +#define JPEG_CMD_DEC_IDLE_LEN sizeof(jpeg_cmd_dec_idle)
    +
    +
    +typedef struct {
    + unsigned short cmd_id;
    +} __attribute__((packed)) jpeg_cmd_dec_idle;
    +
    +
    +/*
    + * Command to inform that an op buffer is ready for use
    + */
    +
    +#define JPEG_CMD_DEC_OP_CONSUMED 0x0005
    +#define JPEG_CMD_DEC_OP_CONSUMED_LEN sizeof(jpeg_cmd_dec_op_consumed)
    +
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int luma_op_buf_addr;
    + unsigned int luma_op_buf_size;
    + unsigned int chroma_op_buf_addr;
    +} __attribute__((packed)) jpeg_cmd_dec_op_consumed;
    +
    +
    +/*
    + * Command to pass a new ip buffer to the jpeg decoder
    + */
    +
    +#define JPEG_CMD_DEC_IP 0x0006
    +#define JPEG_CMD_DEC_IP_LEN sizeof(jpeg_cmd_dec_ip_len)
    +
    +#define JPEG_CMD_EOI_INDICATOR_NOT_END 0x0000
    +#define JPEG_CMD_EOI_INDICATOR_END 0x0001
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int ip_buf_addr;
    + unsigned int ip_buf_size;
    + unsigned int eoi_indicator;
    +} __attribute__((packed)) jpeg_cmd_dec_ip;
    +
    +
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5jpegmsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5jpegmsg.h
    new file mode 100644
    index 0000000..d11aa3f
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5jpegmsg.h
    @@ -0,0 +1,177 @@
    +#ifndef QDSP5VIDJPEGMSGI_H
    +#define QDSP5VIDJPEGMSGI_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + J P E G I N T E R N A L M E S S A G E S
    +
    +GENERAL DESCRIPTION
    + This file contains defintions of format blocks of messages
    + that are sent by JPEG Task
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5jpegmsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $
    +Revision History:
    +
    +when who what, where, why
    +-------- --- ----------------------------------------------------------
    +05/10/08 sv initial version
    +===========================================================================*/
    +
    +/*
    + * Messages from JPEG task to ARM through jpeguPMsgQueue
    + */
    +
    +/*
    + * Message is ACK for CMD_JPEGE_ENCODE cmd
    + */
    +
    +#define JPEG_MSG_ENC_ENCODE_ACK 0x0000
    +#define JPEG_MSG_ENC_ENCODE_ACK_LEN \
    + sizeof(jpeg_msg_enc_encode_ack)
    +
    +typedef struct {
    +} __attribute__((packed)) jpeg_msg_enc_encode_ack;
    +
    +
    +/*
    + * Message informs the up when op buffer is ready for consumption and
    + * when encoding is complete or errors
    + */
    +
    +#define JPEG_MSG_ENC_OP_PRODUCED 0x0001
    +#define JPEG_MSG_ENC_OP_PRODUCED_LEN \
    + sizeof(jpeg_msg_enc_op_produced)
    +
    +#define JPEG_MSGOP_OP_BUF_STATUS_ENC_DONE_PROGRESS 0x0000
    +#define JPEG_MSGOP_OP_BUF_STATUS_ENC_DONE_COMPLETE 0x0001
    +#define JPEG_MSGOP_OP_BUF_STATUS_ENC_ERR 0x10000
    +
    +typedef struct {
    + unsigned int op_buf_addr;
    + unsigned int op_buf_size;
    + unsigned int op_buf_status;
    +} __attribute__((packed)) jpeg_msg_enc_op_produced;
    +
    +
    +/*
    + * Message to ack CMD_JPEGE_IDLE
    + */
    +
    +#define JPEG_MSG_ENC_IDLE_ACK 0x0002
    +#define JPEG_MSG_ENC_IDLE_ACK_LEN sizeof(jpeg_msg_enc_idle_ack)
    +
    +
    +typedef struct {
    +} __attribute__ ((packed)) jpeg_msg_enc_idle_ack;
    +
    +
    +/*
    + * Message to indicate the illegal command
    + */
    +
    +#define JPEG_MSG_ENC_ILLEGAL_COMMAND 0x0003
    +#define JPEG_MSG_ENC_ILLEGAL_COMMAND_LEN \
    + sizeof(jpeg_msg_enc_illegal_command)
    +
    +typedef struct {
    + unsigned int status;
    +} __attribute__((packed)) jpeg_msg_enc_illegal_command;
    +
    +
    +/*
    + * Message to ACK CMD_JPEGD_DECODE
    + */
    +
    +#define JPEG_MSG_DEC_DECODE_ACK 0x0004
    +#define JPEG_MSG_DEC_DECODE_ACK_LEN \
    + sizeof(jpeg_msg_dec_decode_ack)
    +
    +
    +typedef struct {
    +} __attribute__((packed)) jpeg_msg_dec_decode_ack;
    +
    +
    +/*
    + * Message to inform up that an op buffer is ready for consumption and when
    + * decoding is complete or an error occurs
    + */
    +
    +#define JPEG_MSG_DEC_OP_PRODUCED 0x0005
    +#define JPEG_MSG_DEC_OP_PRODUCED_LEN \
    + sizeof(jpeg_msg_dec_op_produced)
    +
    +#define JPEG_MSG_DEC_OP_BUF_STATUS_PROGRESS 0x0000
    +#define JPEG_MSG_DEC_OP_BUF_STATUS_DONE 0x0001
    +
    +typedef struct {
    + unsigned int luma_op_buf_addr;
    + unsigned int chroma_op_buf_addr;
    + unsigned int num_mcus;
    + unsigned int op_buf_status;
    +} __attribute__((packed)) jpeg_msg_dec_op_produced;
    +
    +/*
    + * Message to ack CMD_JPEGD_IDLE cmd
    + */
    +
    +#define JPEG_MSG_DEC_IDLE_ACK 0x0006
    +#define JPEG_MSG_DEC_IDLE_ACK_LEN sizeof(jpeg_msg_dec_idle_ack)
    +
    +
    +typedef struct {
    +} __attribute__((packed)) jpeg_msg_dec_idle_ack;
    +
    +
    +/*
    + * Message to indicate illegal cmd was received
    + */
    +
    +#define JPEG_MSG_DEC_ILLEGAL_COMMAND 0x0007
    +#define JPEG_MSG_DEC_ILLEGAL_COMMAND_LEN \
    + sizeof(jpeg_msg_dec_illegal_command)
    +
    +
    +typedef struct {
    + unsigned int status;
    +} __attribute__((packed)) jpeg_msg_dec_illegal_command;
    +
    +/*
    + * Message to request up for the next segment of ip bit stream
    + */
    +
    +#define JPEG_MSG_DEC_IP_REQUEST 0x0008
    +#define JPEG_MSG_DEC_IP_REQUEST_LEN \
    + sizeof(jpeg_msg_dec_ip_request)
    +
    +
    +typedef struct {
    +} __attribute__((packed)) jpeg_msg_dec_ip_request;
    +
    +
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5lpmcmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5lpmcmdi.h
    new file mode 100644
    index 0000000..6c76e2c
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5lpmcmdi.h
    @@ -0,0 +1,82 @@
    +#ifndef QDSP5LPMCMDI_H
    +#define QDSP5LPMCMDI_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + L P M I N T E R N A L C O M M A N D S
    +
    +GENERAL DESCRIPTION
    + This file contains defintions of format blocks of commands
    + that are accepted by LPM Task
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    +
    +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5lpmcmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $
    +Revision History:
    +
    +when who what, where, why
    +-------- --- ----------------------------------------------------------
    +06/12/08 sv initial version
    +===========================================================================*/
    +
    +
    +/*
    + * Command to start LPM processing based on the config params
    + */
    +
    +#define LPM_CMD_START 0x0000
    +#define LPM_CMD_START_LEN sizeof(lpm_cmd_start)
    +
    +#define LPM_CMD_SPATIAL_FILTER_PART_OPMODE_0 0x00000000
    +#define LPM_CMD_SPATIAL_FILTER_PART_OPMODE_1 0x00010000
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int ip_data_cfg_part1;
    + unsigned int ip_data_cfg_part2;
    + unsigned int ip_data_cfg_part3;
    + unsigned int ip_data_cfg_part4;
    + unsigned int op_data_cfg_part1;
    + unsigned int op_data_cfg_part2;
    + unsigned int op_data_cfg_part3;
    + unsigned int spatial_filter_part[32];
    +} __attribute__((packed)) lpm_cmd_start;
    +
    +
    +
    +/*
    + * Command to stop LPM processing
    + */
    +
    +#define LPM_CMD_IDLE 0x0001
    +#define LPM_CMD_IDLE_LEN sizeof(lpm_cmd_idle)
    +
    +typedef struct {
    + unsigned int cmd_id;
    +} __attribute__((packed)) lpm_cmd_idle;
    +
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5lpmmsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5lpmmsg.h
    new file mode 100644
    index 0000000..3d1039d
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5lpmmsg.h
    @@ -0,0 +1,80 @@
    +#ifndef QDSP5LPMMSGI_H
    +#define QDSP5LPMMSGI_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + L P M I N T E R N A L M E S S A G E S
    +
    +GENERAL DESCRIPTION
    + This file contains defintions of format blocks of commands
    + that are accepted by LPM Task
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5lpmmsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $
    +Revision History:
    +
    +when who what, where, why
    +-------- --- ----------------------------------------------------------
    +06/12/08 sv initial version
    +===========================================================================*/
    +
    +/*
    + * Message to acknowledge CMD_LPM_IDLE command
    + */
    +
    +#define LPM_MSG_IDLE_ACK 0x0000
    +#define LPM_MSG_IDLE_ACK_LEN sizeof(lpm_msg_idle_ack)
    +
    +typedef struct {
    +} __attribute__((packed)) lpm_msg_idle_ack;
    +
    +
    +/*
    + * Message to acknowledge CMD_LPM_START command
    + */
    +
    +
    +#define LPM_MSG_START_ACK 0x0001
    +#define LPM_MSG_START_ACK_LEN sizeof(lpm_msg_start_ack)
    +
    +
    +typedef struct {
    +} __attribute__((packed)) lpm_msg_start_ack;
    +
    +
    +/*
    + * Message to notify the ARM that LPM processing is complete
    + */
    +
    +#define LPM_MSG_DONE 0x0002
    +#define LPM_MSG_DONE_LEN sizeof(lpm_msg_done)
    +
    +typedef struct {
    +} __attribute__((packed)) lpm_msg_done;
    +
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5vdeccmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5vdeccmdi.h
    new file mode 100644
    index 0000000..3a32ee9
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5vdeccmdi.h
    @@ -0,0 +1,235 @@
    +#ifndef QDSP5VIDDECCMDI_H
    +#define QDSP5VIDDECCMDI_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + V I D E O D E C O D E R I N T E R N A L C O M M A N D S
    +
    +GENERAL DESCRIPTION
    + This file contains defintions of format blocks of commands
    + that are accepted by VIDDEC Task
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vdeccmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $
    +Revision History:
    +
    +when who what, where, why
    +-------- --- ----------------------------------------------------------
    +05/10/08 ac initial version
    +===========================================================================*/
    +
    +
    +/*
    + * Command to inform VIDDEC that new subframe packet is ready
    + */
    +
    +#define VIDDEC_CMD_SUBFRAME_PKT 0x0000
    +#define VIDDEC_CMD_SUBFRAME_PKT_LEN \
    + sizeof(viddec_cmd_subframe_pkt)
    +
    +#define VIDDEC_CMD_SF_INFO_1_DM_DMA_STATS_EXCHANGE_FLAG_DM 0x0000
    +#define VIDDEC_CMD_SF_INFO_1_DM_DMA_STATS_EXCHANGE_FLAG_DMA 0x0001
    +
    +#define VIDDEC_CMD_SF_INFO_0_SUBFRAME_CONTI 0x0000
    +#define VIDDEC_CMD_SF_INFO_0_SUBFRAME_FIRST 0x0001
    +#define VIDDEC_CMD_SF_INFO_0_SUBFRAME_LAST 0x0002
    +#define VIDDEC_CMD_SF_INFO_0_SUBFRAME_FIRST_AND_LAST 0x0003
    +
    +#define VIDDEC_CMD_CODEC_SELECTION_WORD_MPEG_4 0x0000
    +#define VIDDEC_CMD_CODEC_SELECTION_WORD_H_263_P0 0x0001
    +#define VIDDEC_CMD_CODEC_SELECTION_WORD_H_264 0x0002
    +#define VIDDEC_CMD_CODEC_SELECTION_WORD_H_263_p3 0x0003
    +#define VIDDEC_CMD_CODEC_SELECTION_WORD_RV9 0x0004
    +#define VIDDEC_CMD_CODEC_SELECTION_WORD_WMV9 0x0005
    +#define VIDDEC_CMD_CODEC_SELECTION_WORD_SMCDB 0x0006
    +#define VIDDEC_CMD_CODEC_SELECTION_WORD_QFRE 0x0007
    +#define VIDDEC_CMD_CODEC_SELECTION_WORD_VLD 0x0008
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short packet_seq_number;
    + unsigned short codec_instance_id;
    + unsigned short subframe_packet_size_high;
    + unsigned short subframe_packet_size_low;
    + unsigned short subframe_packet_high;
    + unsigned short subframe_packet_low;
    + unsigned short subframe_packet_partition;
    + unsigned short statistics_packet_size_high;
    + unsigned short statistics_packet_size_low;
    + unsigned short statistics_packet_high;
    + unsigned short statistics_packet_low;
    + unsigned short statistics_partition;
    + unsigned short subframe_info_1;
    + unsigned short subframe_info_0;
    + unsigned short codec_selection_word;
    + unsigned short num_mbs;
    +} __attribute__((packed)) viddec_cmd_subframe_pkt;
    +
    +
    +/*
    + * Command to inform VIDDEC task that post processing is required for the frame
    + */
    +
    +#define VIDDEC_CMD_PP_ENABLE 0x0001
    +#define VIDDEC_CMD_PP_ENABLE_LEN \
    + sizeof(viddec_cmd_pp_enable)
    +
    +#define VIDDEC_CMD_PP_INFO_0_DM_DMA_LS_EXCHANGE_FLAG_DM 0x0000
    +#define VIDDEC_CMD_PP_INFO_0_DM_DMA_LS_EXCHANGE_FLAG_DMA 0x0001
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short packet_seq_num;
    + unsigned short codec_instance_id;
    + unsigned short postproc_info_0;
    + unsigned short codec_selection_word;
    + unsigned short pp_output_addr_high;
    + unsigned short pp_output_addr_low;
    + unsigned short postproc_info_1;
    + unsigned short load_sharing_packet_size_high;
    + unsigned short load_sharing_packet_size_low;
    + unsigned short load_sharing_packet_high;
    + unsigned short load_sharing_packet_low;
    + unsigned short load_sharing_partition;
    + unsigned short pp_param_0;
    + unsigned short pp_param_1;
    + unsigned short pp_param_2;
    + unsigned short pp_param_3;
    +} __attribute__((packed)) viddec_cmd_pp_enable;
    +
    +
    +/*
    + * FRAME Header Packet : It is at the start of new frame
    + */
    +
    +#define VIDDEC_CMD_FRAME_HEADER_PACKET 0x0002
    +#define VIDDEC_CMD_FRAME_HEADER_PACKET_LEN \
    + sizeof(viddec_cmd_frame_header_packet)
    +
    +#define VIDDEC_CMD_FRAME_INFO_0_ERROR_SKIP 0x0000
    +#define VIDDEC_CMD_FRAME_INFO_0_ERROR_BLACK 0x0800
    +
    +typedef struct {
    + unsigned short packet_id;
    + unsigned short x_dimension;
    + unsigned short y_dimension;
    + unsigned short line_width;
    + unsigned short frame_info_0;
    + unsigned short frame_buffer_0_high;
    + unsigned short frame_buffer_0_low;
    + unsigned short frame_buffer_1_high;
    + unsigned short frame_buffer_1_low;
    + unsigned short frame_buffer_2_high;
    + unsigned short frame_buffer_2_low;
    + unsigned short frame_buffer_3_high;
    + unsigned short frame_buffer_3_low;
    + unsigned short frame_buffer_4_high;
    + unsigned short frame_buffer_4_low;
    + unsigned short frame_buffer_5_high;
    + unsigned short frame_buffer_5_low;
    + unsigned short frame_buffer_6_high;
    + unsigned short frame_buffer_6_low;
    + unsigned short frame_buffer_7_high;
    + unsigned short frame_buffer_7_low;
    + unsigned short frame_buffer_8_high;
    + unsigned short frame_buffer_8_low;
    + unsigned short frame_buffer_9_high;
    + unsigned short frame_buffer_9_low;
    + unsigned short frame_buffer_10_high;
    + unsigned short frame_buffer_10_low;
    + unsigned short frame_buffer_11_high;
    + unsigned short frame_buffer_11_low;
    + unsigned short frame_buffer_12_high;
    + unsigned short frame_buffer_12_low;
    + unsigned short frame_buffer_13_high;
    + unsigned short frame_buffer_13_low;
    + unsigned short frame_buffer_14_high;
    + unsigned short frame_buffer_14_low;
    + unsigned short frame_buffer_15_high;
    + unsigned short frame_buffer_15_low;
    + unsigned short output_frame_buffer_high;
    + unsigned short output_frame_buffer_low;
    + unsigned short end_of_packet_marker;
    +} __attribute__((packed)) viddec_cmd_frame_header_packet;
    +
    +
    +/*
    + * SLICE HEADER PACKET
    + * I-Slice and P-Slice
    + */
    +
    +#define VIDDEC_CMD_SLICE_HEADER_PKT_ISLICE 0x0003
    +#define VIDDEC_CMD_SLICE_HEADER_PKT_ISLICE_LEN \
    + sizeof(viddec_cmd_slice_header_pkt_islice)
    +
    +#define VIDDEC_CMD_ISLICE_INFO_1_MOD_SLICE_TYPE_PSLICE 0x0000
    +#define VIDDEC_CMD_ISLICE_INFO_1_MOD_SLICE_TYPE_BSLICE 0x0100
    +#define VIDDEC_CMD_ISLICE_INFO_1_MOD_SLICE_TYPE_ISLICE 0x0200
    +#define VIDDEC_CMD_ISLICE_INFO_1_MOD_SLICE_TYPE_SPSLICE 0x0300
    +#define VIDDEC_CMD_ISLICE_INFO_1_MOD_SLICE_TYPE_SISLICE 0x0400
    +#define VIDDEC_CMD_ISLICE_INFO_1_NOPADDING 0x0000
    +#define VIDDEC_CMD_ISLICE_INFO_1_PADDING 0x0800
    +
    +#define VIDDEC_CMD_ISLICE_EOP_MARKER 0x7FFF
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short packet_id;
    + unsigned short slice_info_0;
    + unsigned short slice_info_1;
    + unsigned short slice_info_2;
    + unsigned short num_bytes_in_rbsp_high;
    + unsigned short num_bytes_in_rbsp_low;
    + unsigned short num_bytes_in_rbsp_consumed;
    + unsigned short end_of_packet_marker;
    +} __attribute__((packed)) viddec_cmd_slice_header_pkt_islice;
    +
    +
    +#define VIDDEC_CMD_SLICE_HEADER_PKT_PSLICE 0x0003
    +#define VIDDEC_CMD_SLICE_HEADER_PKT_PSLICE_LEN \
    + sizeof(viddec_cmd_slice_header_pkt_pslice)
    +
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short packet_id;
    + unsigned short slice_info_0;
    + unsigned short slice_info_1;
    + unsigned short slice_info_2;
    + unsigned short slice_info_3;
    + unsigned short refidx_l0_map_tab_info_0;
    + unsigned short refidx_l0_map_tab_info_1;
    + unsigned short refidx_l0_map_tab_info_2;
    + unsigned short refidx_l0_map_tab_info_3;
    + unsigned short num_bytes_in_rbsp_high;
    + unsigned short num_bytes_in_rbsp_low;
    + unsigned short num_bytes_in_rbsp_consumed;
    + unsigned short end_of_packet_marker;
    +} __attribute__((packed)) viddec_cmd_slice_header_pkt_pslice;
    +
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5vdecmsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5vdecmsg.h
    new file mode 100644
    index 0000000..c1744c1
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5vdecmsg.h
    @@ -0,0 +1,107 @@
    +#ifndef QDSP5VIDDECMSGI_H
    +#define QDSP5VIDDECMSGI_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + V I D E O D E C O D E R I N T E R N A L M E S S A G E S
    +
    +GENERAL DESCRIPTION
    + This file contains defintions of format blocks of messages
    + that are sent by VIDDEC Task
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vdecmsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $
    +Revision History:
    +
    +when who what, where, why
    +-------- --- ----------------------------------------------------------
    +05/10/08 ac initial version
    +===========================================================================*/
    +
    +/*
    + * Message to inform ARM which VDEC_SUBFRAME_PKT_CMD processed by VIDDEC TASK
    + */
    +
    +#define VIDDEC_MSG_SUBF_DONE 0x0000
    +#define VIDDEC_MSG_SUBF_DONE_LEN \
    + sizeof(viddec_msg_subf_done)
    +
    +typedef struct {
    + unsigned short packet_seq_number;
    + unsigned short codec_instance_id;
    +} __attribute__((packed)) viddec_msg_subf_done;
    +
    +
    +/*
    + * Message to inform ARM one frame has been decoded
    + */
    +
    +#define VIDDEC_MSG_FRAME_DONE 0x0001
    +#define VIDDEC_MSG_FRAME_DONE_LEN \
    + sizeof(viddec_msg_frame_done)
    +
    +typedef struct {
    + unsigned short packet_seq_number;
    + unsigned short codec_instance_id;
    +} __attribute__((packed)) viddec_msg_frame_done;
    +
    +
    +/*
    + * Message to inform ARM that post processing frame has been decoded
    + */
    +
    +#define VIDDEC_MSG_PP_ENABLE_CMD_DONE 0x0002
    +#define VIDDEC_MSG_PP_ENABLE_CMD_DONE_LEN \
    + sizeof(viddec_msg_pp_enable_cmd_done)
    +
    +typedef struct {
    + unsigned short packet_seq_number;
    + unsigned short codec_instance_id;
    +} __attribute__((packed)) viddec_msg_pp_enable_cmd_done;
    +
    +
    +/*
    + * Message to inform ARM that one post processing frame has been decoded
    + */
    +
    +
    +#define VIDDEC_MSG_PP_FRAME_DONE 0x0003
    +#define VIDDEC_MSG_PP_FRAME_DONE_LEN \
    + sizeof(viddec_msg_pp_frame_done)
    +
    +#define VIDDEC_MSG_DISP_WORTHY_DISP 0x0000
    +#define VIDDEC_MSG_DISP_WORTHY_DISP_NONE 0xFFFF
    +
    +
    +typedef struct {
    + unsigned short packet_seq_number;
    + unsigned short codec_instance_id;
    + unsigned short display_worthy;
    +} __attribute__((packed)) viddec_msg_pp_frame_done;
    +
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5venccmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5venccmdi.h
    new file mode 100644
    index 0000000..819544d
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5venccmdi.h
    @@ -0,0 +1,212 @@
    +#ifndef QDSP5VIDENCCMDI_H
    +#define QDSP5VIDENCCMDI_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + V I D E O E N C O D E R I N T E R N A L C O M M A N D S
    +
    +GENERAL DESCRIPTION
    + This file contains defintions of format blocks of commands
    + that are accepted by VIDENC Task
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 2008 by QUALCOMM, Incorporated.
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    +Revision History:
    +
    +when who what, where, why
    +-------- --- ----------------------------------------------------------
    +09/25/08 umeshp initial version
    +===========================================================================*/
    +
    + #define VIDENC_CMD_CFG 0x0000
    + #define VIDENC_CMD_ACTIVE 0x0001
    + #define VIDENC_CMD_IDLE 0x0002
    + #define VIDENC_CMD_FRAME_START 0x0003
    + #define VIDENC_CMD_STATUS_QUERY 0x0004
    + #define VIDENC_CMD_RC_CFG 0x0005
    + #define VIDENC_CMD_DIS_CFG 0x0006
    + #define VIDENC_CMD_DIS 0x0007
    + #define VIDENC_CMD_INTRA_REFRESH 0x0008
    + #define VIDENC_CMD_DIGITAL_ZOOM 0x0009
    +
    +
    +/*
    + * Command to pass the frame message information to VIDENC
    + */
    +
    +
    +#define VIDENC_CMD_FRAME_START_LEN \
    + sizeof(videnc_cmd_frame_start)
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short frame_info;
    + unsigned short frame_rho_budget_word_high;
    + unsigned short frame_rho_budget_word_low;
    + unsigned short input_luma_addr_high;
    + unsigned short input_luma_addr_low;
    + unsigned short input_chroma_addr_high;
    + unsigned short input_chroma_addr_low;
    + unsigned short ref_vop_buf_ptr_high;
    + unsigned short ref_vop_buf_ptr_low;
    + unsigned short enc_pkt_buf_ptr_high;
    + unsigned short enc_pkt_buf_ptr_low;
    + unsigned short enc_pkt_buf_size_high;
    + unsigned short enc_pkt_buf_size_low;
    + unsigned short unfilt_recon_vop_buf_ptr_high;
    + unsigned short unfilt_recon_vop_buf_ptr_low;
    + unsigned short filt_recon_vop_buf_ptr_high;
    + unsigned short filt_recon_vop_buf_ptr_low;
    +} __attribute__((packed)) videnc_cmd_frame_start;
    +
    +/*
    + * Command to pass the frame-level digital stabilization parameters to VIDENC
    + */
    +
    +
    +#define VIDENC_CMD_DIS_LEN \
    + sizeof(videnc_cmd_dis)
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short vfe_out_prev_luma_addr_high;
    + unsigned short vfe_out_prev_luma_addr_low;
    + unsigned short stabilization_info;
    +} __attribute__((packed)) videnc_cmd_dis;
    +
    +/*
    + * Command to pass the codec related parameters to VIDENC
    + */
    +
    +
    +#define VIDENC_CMD_CFG_LEN \
    + sizeof(videnc_cmd_cfg)
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short cfg_info_0;
    + unsigned short cfg_info_1;
    + unsigned short four_mv_threshold;
    + unsigned short ise_fse_mv_cost_fac;
    + unsigned short venc_frame_dim;
    + unsigned short venc_DM_partition;
    +} __attribute__((packed)) videnc_cmd_cfg;
    +
    +/*
    + * Command to start the video encoding
    + */
    +
    +
    +#define VIDENC_CMD_ACTIVE_LEN \
    + sizeof(videnc_cmd_active)
    +
    +typedef struct {
    + unsigned short cmd_id;
    +} __attribute__((packed)) videnc_cmd_active;
    +
    +/*
    + * Command to stop the video encoding
    + */
    +
    +
    +#define VIDENC_CMD_IDLE_LEN \
    + sizeof(videnc_cmd_idle)
    +
    +typedef struct {
    + unsigned short cmd_id;
    +} __attribute__((packed)) videnc_cmd_idle;
    +
    +/*
    + * Command to query staus of VIDENC
    + */
    +
    +
    +#define VIDENC_CMD_STATUS_QUERY_LEN \
    + sizeof(videnc_cmd_status_query)
    +
    +typedef struct {
    + unsigned short cmd_id;
    +} __attribute__((packed)) videnc_cmd_status_query;
    +
    +/*
    + * Command to set rate control for a frame
    + */
    +
    +
    +#define VIDENC_CMD_RC_CFG_LEN \
    + sizeof(videnc_cmd_rc_cfg)
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short max_frame_qp_delta;
    + unsigned short max_min_frame_qp;
    +} __attribute__((packed)) videnc_cmd_rc_cfg;
    +
    +/*
    + * Command to set intra-refreshing
    + */
    +
    +
    +#define VIDENC_CMD_INTRA_REFRESH_LEN \
    + sizeof(videnc_cmd_intra_refresh)
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short num_mb_refresh;
    + unsigned short mb_index[15];
    +} __attribute__((packed)) videnc_cmd_intra_refresh;
    +
    +/*
    + * Command to pass digital zoom information to the VIDENC
    + */
    +#define VIDENC_CMD_DIGITAL_ZOOM_LEN \
    + sizeof(videnc_cmd_digital_zoom)
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short digital_zoom_en;
    + unsigned short luma_frame_shift_X;
    + unsigned short luma_frame_shift_Y;
    + unsigned short up_ip_luma_rows;
    + unsigned short up_ip_luma_cols;
    + unsigned short up_ip_chroma_rows;
    + unsigned short up_ip_chroma_cols;
    + unsigned short luma_ph_incr_V_low;
    + unsigned short luma_ph_incr_V_high;
    + unsigned short luma_ph_incr_H_low;
    + unsigned short luma_ph_incr_H_high;
    + unsigned short chroma_ph_incr_V_low;
    + unsigned short chroma_ph_incr_V_high;
    + unsigned short chroma_ph_incr_H_low;
    + unsigned short chroma_ph_incr_H_high;
    +} __attribute__((packed)) videnc_cmd_digital_zoom;
    +
    +/*
    + * Command to configure digital stabilization parameters
    + */
    +
    +#define VIDENC_CMD_DIS_CFG_LEN \
    + sizeof(videnc_cmd_dis_cfg)
    +
    +typedef struct {
    + unsigned short cmd_id;
    + unsigned short image_stab_subf_start_row_col;
    + unsigned short image_stab_subf_dim;
    + unsigned short image_stab_info_0;
    +} __attribute__((packed)) videnc_cmd_dis_cfg;
    +
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5vfecmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5vfecmdi.h
    new file mode 100644
    index 0000000..f76d4e4
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5vfecmdi.h
    @@ -0,0 +1,910 @@
    +#ifndef QDSP5VFECMDI_H
    +#define QDSP5VFECMDI_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + V F E I N T E R N A L C O M M A N D S
    +
    +GENERAL DESCRIPTION
    + This file contains defintions of format blocks of commands
    + that are accepted by VFE Task
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vfecmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $
    +Revision History:
    +
    +when who what, where, why
    +-------- --- ----------------------------------------------------------
    +06/12/08 sv initial version
    +===========================================================================*/
    +
    +/******************************************************************************
    + * Commands through vfeCommandScaleQueue
    + *****************************************************************************/
    +
    +/*
    + * Command to program scaler for op1 . max op of scaler is VGA
    + */
    +
    +
    +#define VFE_CMD_SCALE_OP1_CFG 0x0000
    +#define VFE_CMD_SCALE_OP1_CFG_LEN \
    + sizeof(vfe_cmd_scale_op1_cfg)
    +
    +#define VFE_CMD_SCALE_OP1_SEL_IP_SEL_Y_STANDARD 0x0000
    +#define VFE_CMD_SCALE_OP1_SEL_IP_SEL_Y_CASCADED 0x0001
    +#define VFE_CMD_SCALE_OP1_SEL_H_Y_SCALER_DIS 0x0000
    +#define VFE_CMD_SCALE_OP1_SEL_H_Y_SCALER_ENA 0x0002
    +#define VFE_CMD_SCALE_OP1_SEL_H_PP_Y_SCALER_DIS 0x0000
    +#define VFE_CMD_SCALE_OP1_SEL_H_PP_Y_SCALER_ENA 0x0004
    +#define VFE_CMD_SCALE_OP1_SEL_V_Y_SCALER_DIS 0x0000
    +#define VFE_CMD_SCALE_OP1_SEL_V_Y_SCALER_ENA 0x0008
    +#define VFE_CMD_SCALE_OP1_SEL_V_PP_Y_SCALER_DIS 0x0000
    +#define VFE_CMD_SCALE_OP1_SEL_V_PP_Y_SCALER_ENA 0x0010
    +#define VFE_CMD_SCALE_OP1_SEL_IP_SEL_CBCR_STANDARD 0x0000
    +#define VFE_CMD_SCALE_OP1_SEL_IP_SEL_CBCR_CASCADED 0x0020
    +#define VFE_CMD_SCALE_OP1_SEL_H_CBCR_SCALER_DIS 0x0000
    +#define VFE_CMD_SCALE_OP1_SEL_H_CBCR_SCALER_ENA 0x0040
    +#define VFE_CMD_SCALE_OP1_SEL_V_CBCR_SCALER_DIS 0x0000
    +#define VFE_CMD_SCALE_OP1_SEL_V_CBCR_SCALER_ENA 0x0080
    +
    +#define VFE_CMD_OP1_PP_Y_SCALER_CFG_PART1_DONT_LOAD_COEFFS 0x80000000
    +#define VFE_CMD_OP1_PP_Y_SCALER_CFG_PART1_LOAD_COEFFS 0x80000000
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int scale_op1_sel;
    + unsigned int y_scaler_cfg_part1;
    + unsigned int y_scaler_cfg_part2;
    + unsigned int cbcr_scaler_cfg_part1;
    + unsigned int cbcr_scaler_cfg_part2;
    + unsigned int cbcr_scaler_cfg_part3;
    + unsigned int pp_y_scaler_cfg_part1;
    + unsigned int pp_y_scaler_cfg_part2;
    + unsigned int y_scaler_v_coeff_bank_part1[16];
    + unsigned int y_scaler_v_coeff_bank_part2[16];
    + unsigned int y_scaler_h_coeff_bank_part1[16];
    + unsigned int y_scaler_h_coeff_bank_part2[16];
    +} __attribute__((packed)) vfe_cmd_scale_op1_cfg;
    +
    +
    +/*
    + * Command to program scaler for op2
    + */
    +
    +#define VFE_CMD_SCALE_OP2_CFG 0x0001
    +#define VFE_CMD_SCALE_OP2_CFG_LEN \
    + sizeof(vfe_cmd_scale_op2_cfg)
    +
    +#define VFE_CMD_SCALE_OP2_SEL_IP_SEL_Y_STANDARD 0x0000
    +#define VFE_CMD_SCALE_OP2_SEL_IP_SEL_Y_CASCADED 0x0001
    +#define VFE_CMD_SCALE_OP2_SEL_H_Y_SCALER_DIS 0x0000
    +#define VFE_CMD_SCALE_OP2_SEL_H_Y_SCALER_ENA 0x0002
    +#define VFE_CMD_SCALE_OP2_SEL_H_PP_Y_SCALER_DIS 0x0000
    +#define VFE_CMD_SCALE_OP2_SEL_H_PP_Y_SCALER_ENA 0x0004
    +#define VFE_CMD_SCALE_OP2_SEL_V_Y_SCALER_DIS 0x0000
    +#define VFE_CMD_SCALE_OP2_SEL_V_Y_SCALER_ENA 0x0008
    +#define VFE_CMD_SCALE_OP2_SEL_V_PP_Y_SCALER_DIS 0x0000
    +#define VFE_CMD_SCALE_OP2_SEL_V_PP_Y_SCALER_ENA 0x0010
    +#define VFE_CMD_SCALE_OP2_SEL_IP_SEL_CBCR_STANDARD 0x0000
    +#define VFE_CMD_SCALE_OP2_SEL_IP_SEL_CBCR_CASCADED 0x0020
    +#define VFE_CMD_SCALE_OP2_SEL_H_CBCR_SCALER_DIS 0x0000
    +#define VFE_CMD_SCALE_OP2_SEL_H_CBCR_SCALER_ENA 0x0040
    +#define VFE_CMD_SCALE_OP2_SEL_V_CBCR_SCALER_DIS 0x0000
    +#define VFE_CMD_SCALE_OP2_SEL_V_CBCR_SCALER_ENA 0x0080
    +
    +#define VFE_CMD_OP2_PP_Y_SCALER_CFG_PART1_DONT_LOAD_COEFFS 0x80000000
    +#define VFE_CMD_OP2_PP_Y_SCALER_CFG_PART1_LOAD_COEFFS 0x80000000
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int scale_op2_sel;
    + unsigned int y_scaler_cfg_part1;
    + unsigned int y_scaler_cfg_part2;
    + unsigned int cbcr_scaler_cfg_part1;
    + unsigned int cbcr_scaler_cfg_part2;
    + unsigned int cbcr_scaler_cfg_part3;
    + unsigned int pp_y_scaler_cfg_part1;
    + unsigned int pp_y_scaler_cfg_part2;
    + unsigned int y_scaler_v_coeff_bank_part1[16];
    + unsigned int y_scaler_v_coeff_bank_part2[16];
    + unsigned int y_scaler_h_coeff_bank_part1[16];
    + unsigned int y_scaler_h_coeff_bank_part2[16];
    +} __attribute__((packed)) vfe_cmd_scale_op2_cfg;
    +
    +
    +/******************************************************************************
    + * Commands through vfeCommandTableQueue
    + *****************************************************************************/
    +
    +/*
    + * Command to program the AXI ip paths
    + */
    +
    +#define VFE_CMD_AXI_IP_CFG 0x0000
    +#define VFE_CMD_AXI_IP_CFG_LEN sizeof(vfe_cmd_axi_ip_cfg)
    +
    +#define VFE_CMD_IP_SEL_IP_FORMAT_8 0x0000
    +#define VFE_CMD_IP_SEL_IP_FORMAT_10 0x0001
    +#define VFE_CMD_IP_SEL_IP_FORMAT_12 0x0002
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int ip_sel;
    + unsigned int ip_cfg_part1;
    + unsigned int ip_cfg_part2;
    + unsigned int ip_unpack_cfg_part[6];
    + unsigned int ip_buf_addr[8];
    +} __attribute__ ((packed)) vfe_cmd_axi_ip_cfg;
    +
    +
    +/*
    + * Command to program axi op paths
    + */
    +
    +#define VFE_CMD_AXI_OP_CFG 0x0001
    +#define VFE_CMD_AXI_OP_CFG_LEN sizeof(vfe_cmd_axi_op_cfg)
    +
    +#define VFE_CMD_OP_SEL_OP1 0x0000
    +#define VFE_CMD_OP_SEL_OP2 0x0001
    +#define VFE_CMD_OP_SEL_OP1_OP2 0x0002
    +#define VFE_CMD_OP_SEL_CTOA 0x0003
    +#define VFE_CMD_OP_SEL_CTOA_OP1 0x0004
    +#define VFE_CMD_OP_SEL_CTOA_OP2 0x0005
    +#define VFE_CMD_OP_SEL_OP_FORMAT_8 0x0000
    +#define VFE_CMD_OP_SEL_OP_FORMAT_10 0x0008
    +#define VFE_CMD_OP_SEL_OP_FORMAT_12 0x0010
    +
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int op_sel;
    + unsigned int op1_y_cfg_part1;
    + unsigned int op1_y_cfg_part2;
    + unsigned int op1_cbcr_cfg_part1;
    + unsigned int op1_cbcr_cfg_part2;
    + unsigned int op2_y_cfg_part1;
    + unsigned int op2_y_cfg_part2;
    + unsigned int op2_cbcr_cfg_part1;
    + unsigned int op2_cbcr_cfg_part2;
    + unsigned int op1_buf1_addr[16];
    + unsigned int op2_buf1_addr[16];
    +} __attribute__((packed)) vfe_cmd_axi_op_cfg;
    +
    +
    +
    +
    +/*
    + * Command to program the roll off correction module
    + */
    +
    +#define VFE_CMD_ROLLOFF_CFG 0x0002
    +#define VFE_CMD_ROLLOFF_CFG_LEN \
    + sizeof(vfe_cmd_rolloff_cfg)
    +
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int correction_opt_center_pos;
    + unsigned int radius_square_entry[32];
    + unsigned int red_table_entry[32];
    + unsigned int green_table_entry[32];
    + unsigned int blue_table_entry[32];
    +} __attribute__((packed)) vfe_cmd_rolloff_cfg;
    +
    +/*
    + * Command to program RGB gamma table
    + */
    +
    +#define VFE_CMD_RGB_GAMMA_CFG 0x0003
    +#define VFE_CMD_RGB_GAMMA_CFG_LEN \
    + sizeof(vfe_cmd_rgb_gamma_cfg)
    +
    +#define VFE_CMD_RGB_GAMMA_SEL_LINEAR 0x0000
    +#define VFE_CMD_RGB_GAMMA_SEL_PW_LINEAR 0x0001
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int rgb_gamma_sel;
    + unsigned int rgb_gamma_entry[256];
    +} __attribute__((packed)) vfe_cmd_rgb_gamma_cfg;
    +
    +
    +/*
    + * Command to program luma gamma table for the noise reduction path
    + */
    +
    +#define VFE_CMD_Y_GAMMA_CFG 0x0004
    +#define VFE_CMD_Y_GAMMA_CFG_LEN \
    + sizeof(vfe_cmd_y_gamma_cfg)
    +
    +#define VFE_CMD_Y_GAMMA_SEL_LINEAR 0x0000
    +#define VFE_CMD_Y_GAMMA_SEL_PW_LINEAR 0x0001
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int y_gamma_sel;
    + unsigned int y_gamma_entry[256];
    +} __attribute__((packed)) vfe_cmd_y_gamma_cfg;
    +
    +
    +
    +/******************************************************************************
    + * Commands through vfeCommandQueue
    + *****************************************************************************/
    +
    +/*
    + * Command to reset the VFE to a known good state.All previously programmed
    + * Params will be lost
    + */
    +
    +
    +#define VFE_CMD_RESET 0x0000
    +#define VFE_CMD_RESET_LEN sizeof(vfe_cmd_reset)
    +
    +
    +typedef struct {
    + unsigned short cmd_id;
    +} __attribute__((packed)) vfe_cmd_reset;
    +
    +
    +/*
    + * Command to start VFE processing based on the config params
    + */
    +
    +
    +#define VFE_CMD_START 0x0001
    +#define VFE_CMD_START_LEN sizeof(vfe_cmd_start)
    +
    +#define VFE_CMD_STARTUP_PARAMS_SRC_CAMIF 0x0000
    +#define VFE_CMD_STARTUP_PARAMS_SRC_AXI 0x0001
    +#define VFE_CMD_STARTUP_PARAMS_MODE_CONTINUOUS 0x0000
    +#define VFE_CMD_STARTUP_PARAMS_MODE_SNAPSHOT 0x0002
    +
    +#define VFE_CMD_IMAGE_PL_BLACK_LVL_CORR_DIS 0x0000
    +#define VFE_CMD_IMAGE_PL_BLACK_LVL_CORR_ENA 0x0001
    +#define VFE_CMD_IMAGE_PL_ROLLOFF_CORR_DIS 0x0000
    +#define VFE_CMD_IMAGE_PL_ROLLOFF_CORR_ENA 0x0002
    +#define VFE_CMD_IMAGE_PL_WHITE_BAL_DIS 0x0000
    +#define VFE_CMD_IMAGE_PL_WHITE_BAL_ENA 0x0004
    +#define VFE_CMD_IMAGE_PL_RGB_GAMMA_DIS 0x0000
    +#define VFE_CMD_IMAGE_PL_RGB_GAMMA_ENA 0x0008
    +#define VFE_CMD_IMAGE_PL_LUMA_NOISE_RED_PATH_DIS 0x0000
    +#define VFE_CMD_IMAGE_PL_LUMA_NOISE_RED_PATH_ENA 0x0010
    +#define VFE_CMD_IMAGE_PL_ADP_FILTER_DIS 0x0000
    +#define VFE_CMD_IMAGE_PL_ADP_FILTER_ENA 0x0020
    +#define VFE_CMD_IMAGE_PL_CHROMA_SAMP_DIS 0x0000
    +#define VFE_CMD_IMAGE_PL_CHROMA_SAMP_ENA 0x0040
    +
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int startup_params;
    + unsigned int image_pipeline;
    + unsigned int frame_dimension;
    +} __attribute__((packed)) vfe_cmd_start;
    +
    +
    +/*
    + * Command to halt all processing
    + */
    +
    +#define VFE_CMD_STOP 0x0002
    +#define VFE_CMD_STOP_LEN sizeof(vfe_cmd_stop)
    +
    +typedef struct {
    + unsigned short cmd_id;
    +} __attribute__((packed)) vfe_cmd_stop;
    +
    +
    +/*
    + * Command to commit the params that have been programmed to take
    + * effect on the next frame
    + */
    +
    +#define VFE_CMD_UPDATE 0x0003
    +#define VFE_CMD_UPDATE_LEN sizeof(vfe_cmd_update)
    +
    +
    +typedef struct {
    + unsigned short cmd_id;
    +} __attribute__((packed)) vfe_cmd_update;
    +
    +
    +/*
    + * Command to program CAMIF module
    + */
    +
    +#define VFE_CMD_CAMIF_CFG 0x0004
    +#define VFE_CMD_CAMIF_CFG_LEN sizeof(vfe_cmd_camif_cfg)
    +
    +#define VFE_CMD_CFG_VSYNC_SYNC_EDGE_HIGH 0x0000
    +#define VFE_CMD_CFG_VSYNC_SYNC_EDGE_LOW 0x0002
    +#define VFE_CMD_CFG_HSYNC_SYNC_EDGE_HIGH 0x0000
    +#define VFE_CMD_CFG_HSYNC_SYNC_EDGE_LOW 0x0004
    +#define VFE_CMD_CFG_SYNC_MODE_APS 0x0000
    +#define VFE_CMD_CFG_SYNC_MODE_EFS 0X0008
    +#define VFE_CMD_CFG_SYNC_MODE_ELS 0x0010
    +#define VFE_CMD_CFG_SYNC_MODE_RVD 0x0018
    +#define VFE_CMD_CFG_VFE_SUBSAMP_EN_DIS 0x0000
    +#define VFE_CMD_CFG_VFE_SUBSAMP_EN_ENA 0x0020
    +#define VFE_CMD_CFG_BUS_SUBSAMP_EN_DIS 0x0000
    +#define VFE_CMD_CFG_BUS_SUBSAMP_EN_ENA 0x0080
    +#define VFE_CMD_CFG_IRQ_SUBSAMP_EN_DIS 0x0000
    +#define VFE_CMD_CFG_IRQ_SUBSAMP_EN_ENA 0x0800
    +
    +#define VFE_CMD_SUBSAMP2_CFG_PIXEL_SKIP_16 0x0000
    +#define VFE_CMD_SUBSAMP2_CFG_PIXEL_SKIP_12 0x0010
    +
    +#define VFE_CMD_EPOCH_IRQ_1_DIS 0x0000
    +#define VFE_CMD_EPOCH_IRQ_1_ENA 0x4000
    +#define VFE_CMD_EPOCH_IRQ_2_DIS 0x0000
    +#define VFE_CMD_EPOCH_IRQ_2_ENA 0x8000
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int cfg;
    + unsigned int efs_cfg;
    + unsigned int frame_cfg;
    + unsigned int window_width_cfg;
    + unsigned int window_height_cfg;
    + unsigned int subsamp1_cfg;
    + unsigned int subsamp2_cfg;
    + unsigned int epoch_irq;
    +} __attribute__((packed)) vfe_cmd_camif_cfg;
    +
    +
    +
    +/*
    + * Command to program the black level module
    + */
    +
    +#define VFE_CMD_BLACK_LVL_CFG 0x0005
    +#define VFE_CMD_BLACK_LVL_CFG_LEN sizeof(vfe_cmd_black_lvl_cfg)
    +
    +#define VFE_CMD_BL_SEL_MANUAL 0x0000
    +#define VFE_CMD_BL_SEL_AUTO 0x0001
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int black_lvl_sel;
    + unsigned int cfg_part[3];
    +} __attribute__((packed)) vfe_cmd_black_lvl_cfg;
    +
    +
    +/*
    + * Command to program the active region by cropping the region of interest
    + */
    +
    +#define VFE_CMD_ACTIVE_REGION_CFG 0x0006
    +#define VFE_CMD_ACTIVE_REGION_CFG_LEN \
    + sizeof(vfe_cmd_active_region_cfg)
    +
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int cfg_part1;
    + unsigned int cfg_part2;
    +} __attribute__((packed)) vfe_cmd_active_region_cfg;
    +
    +
    +
    +/*
    + * Command to program the defective pixel correction(DPC) ,
    + * adaptive bayer filter (ABF) and demosaic modules
    + */
    +
    +#define VFE_CMD_DEMOSAIC_CFG 0x0007
    +#define VFE_CMD_DEMOSAIC_CFG_LEN sizeof(vfe_cmd_demosaic_cfg)
    +
    +#define VFE_CMD_DEMOSAIC_PART1_ABF_EN_DIS 0x0000
    +#define VFE_CMD_DEMOSAIC_PART1_ABF_EN_ENA 0x0001
    +#define VFE_CMD_DEMOSAIC_PART1_DPC_EN_DIS 0x0000
    +#define VFE_CMD_DEMOSAIC_PART1_DPC_EN_ENA 0x0002
    +#define VFE_CMD_DEMOSAIC_PART1_FORCE_ABF_OFF 0x0000
    +#define VFE_CMD_DEMOSAIC_PART1_FORCE_ABF_ON 0x0004
    +#define VFE_CMD_DEMOSAIC_PART1_SLOPE_SHIFT_1 0x00000000
    +#define VFE_CMD_DEMOSAIC_PART1_SLOPE_SHIFT_2 0x10000000
    +#define VFE_CMD_DEMOSAIC_PART1_SLOPE_SHIFT_4 0x20000000
    +#define VFE_CMD_DEMOSAIC_PART1_SLOPE_SHIFT_8 0x30000000
    +#define VFE_CMD_DEMOSAIC_PART1_SLOPE_SHIFT_1_2 0x50000000
    +#define VFE_CMD_DEMOSAIC_PART1_SLOPE_SHIFT_1_4 0x60000000
    +#define VFE_CMD_DEMOSAIC_PART1_SLOPE_SHIFT_1_8 0x70000000
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int demosaic_part1;
    + unsigned int demosaic_part2;
    + unsigned int demosaic_part3;
    + unsigned int demosaic_part4;
    + unsigned int demosaic_part5;
    +} __attribute__((packed)) vfe_cmd_demosaic_cfg;
    +
    +
    +/*
    + * Command to program the ip format
    + */
    +
    +#define VFE_CMD_IP_FORMAT_CFG 0x0008
    +#define VFE_CMD_IP_FORMAT_CFG_LEN \
    + sizeof(vfe_cmd_ip_format_cfg)
    +
    +#define VFE_CMD_IP_FORMAT_SEL_RGRG 0x0000
    +#define VFE_CMD_IP_FORMAT_SEL_GRGR 0x0001
    +#define VFE_CMD_IP_FORMAT_SEL_BGBG 0x0002
    +#define VFE_CMD_IP_FORMAT_SEL_GBGB 0x0003
    +#define VFE_CMD_IP_FORMAT_SEL_YCBYCR 0x0004
    +#define VFE_CMD_IP_FORMAT_SEL_YCRYCB 0x0005
    +#define VFE_CMD_IP_FORMAT_SEL_CBYCRY 0x0006
    +#define VFE_CMD_IP_FORMAT_SEL_CRYCBY 0x0007
    +#define VFE_CMD_IP_FORMAT_SEL_NO_CHROMA 0x0000
    +#define VFE_CMD_IP_FORMAT_SEL_CHROMA 0x0008
    +
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int ip_format_sel;
    + unsigned int balance_gains_part1;
    + unsigned int balance_gains_part2;
    +} __attribute__((packed)) vfe_cmd_ip_format_cfg;
    +
    +
    +
    +/*
    + * Command to program max and min allowed op values
    + */
    +
    +#define VFE_CMD_OP_CLAMP_CFG 0x0009
    +#define VFE_CMD_OP_CLAMP_CFG_LEN \
    + sizeof(vfe_cmd_op_clamp_cfg)
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int op_clamp_max;
    + unsigned int op_clamp_min;
    +} __attribute__((packed)) vfe_cmd_op_clamp_cfg;
    +
    +
    +/*
    + * Command to program chroma sub sample module
    + */
    +
    +#define VFE_CMD_CHROMA_SUBSAMPLE_CFG 0x000A
    +#define VFE_CMD_CHROMA_SUBSAMPLE_CFG_LEN \
    + sizeof(vfe_cmd_chroma_subsample_cfg)
    +
    +#define VFE_CMD_CHROMA_SUBSAMP_SEL_H_INTERESTIAL_SAMPS 0x0000
    +#define VFE_CMD_CHROMA_SUBSAMP_SEL_H_COSITED_SAMPS 0x0001
    +#define VFE_CMD_CHROMA_SUBSAMP_SEL_V_INTERESTIAL_SAMPS 0x0000
    +#define VFE_CMD_CHROMA_SUBSAMP_SEL_V_COSITED_SAMPS 0x0002
    +#define VFE_CMD_CHROMA_SUBSAMP_SEL_H_SUBSAMP_DIS 0x0000
    +#define VFE_CMD_CHROMA_SUBSAMP_SEL_H_SUBSAMP_ENA 0x0004
    +#define VFE_CMD_CHROMA_SUBSAMP_SEL_V_SUBSAMP_DIS 0x0000
    +#define VFE_CMD_CHROMA_SUBSAMP_SEL_V_SUBSAMP_ENA 0x0008
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int chroma_subsamp_sel;
    +} __attribute__((packed)) vfe_cmd_chroma_subsample_cfg;
    +
    +
    +/*
    + * Command to program the white balance module
    + */
    +
    +#define VFE_CMD_WHITE_BALANCE_CFG 0x000B
    +#define VFE_CMD_WHITE_BALANCE_CFG_LEN \
    + sizeof(vfe_cmd_white_balance_cfg)
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int white_balance_gains;
    +} __attribute__((packed)) vfe_cmd_white_balance_cfg;
    +
    +
    +/*
    + * Command to program the color processing module
    + */
    +
    +#define VFE_CMD_COLOR_PROCESS_CFG 0x000C
    +#define VFE_CMD_COLOR_PROCESS_CFG_LEN \
    + sizeof(vfe_cmd_color_process_cfg)
    +
    +#define VFE_CMD_COLOR_CORRE_PART7_Q7_FACTORS 0x0000
    +#define VFE_CMD_COLOR_CORRE_PART7_Q8_FACTORS 0x0001
    +#define VFE_CMD_COLOR_CORRE_PART7_Q9_FACTORS 0x0002
    +#define VFE_CMD_COLOR_CORRE_PART7_Q10_FACTORS 0x0003
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int color_correction_part1;
    + unsigned int color_correction_part2;
    + unsigned int color_correction_part3;
    + unsigned int color_correction_part4;
    + unsigned int color_correction_part5;
    + unsigned int color_correction_part6;
    + unsigned int color_correction_part7;
    + unsigned int chroma_enhance_part1;
    + unsigned int chroma_enhance_part2;
    + unsigned int chroma_enhance_part3;
    + unsigned int chroma_enhance_part4;
    + unsigned int chroma_enhance_part5;
    + unsigned int luma_calc_part1;
    + unsigned int luma_calc_part2;
    +} __attribute__((packed)) vfe_cmd_color_process_cfg;
    +
    +
    +/*
    + * Command to program adaptive filter module
    + */
    +
    +#define VFE_CMD_ADP_FILTER_CFG 0x000D
    +#define VFE_CMD_ADP_FILTER_CFG_LEN \
    + sizeof(vfe_cmd_adp_filter_cfg)
    +
    +#define VFE_CMD_ASF_CFG_PART_SMOOTH_FILTER_DIS 0x0000
    +#define VFE_CMD_ASF_CFG_PART_SMOOTH_FILTER_ENA 0x0001
    +#define VFE_CMD_ASF_CFG_PART_NO_SHARP_MODE 0x0000
    +#define VFE_CMD_ASF_CFG_PART_SINGLE_FILTER 0x0002
    +#define VFE_CMD_ASF_CFG_PART_DUAL_FILTER 0x0004
    +#define VFE_CMD_ASF_CFG_PART_SHARP_MODE 0x0007
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int asf_cfg_part[7];
    +} __attribute__((packed)) vfe_cmd_adp_filter_cfg;
    +
    +
    +/*
    + * Command to program for frame skip pattern for op1 and op2
    + */
    +
    +#define VFE_CMD_FRAME_SKIP_CFG 0x000E
    +#define VFE_CMD_FRAME_SKIP_CFG_LEN \
    + sizeof(vfe_cmd_frame_skip_cfg)
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int frame_skip_pattern_op1;
    + unsigned int frame_skip_pattern_op2;
    +} __attribute__((packed)) vfe_cmd_frame_skip_cfg;
    +
    +
    +/*
    + * Command to program field-of-view crop for digital zoom
    + */
    +
    +#define VFE_CMD_FOV_CROP 0x000F
    +#define VFE_CMD_FOV_CROP_LEN sizeof(vfe_cmd_fov_crop)
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int fov_crop_part1;
    + unsigned int fov_crop_part2;
    +} __attribute__((packed)) vfe_cmd_fov_crop;
    +
    +
    +
    +/*
    + * Command to program auto focus(AF) statistics module
    + */
    +
    +#define VFE_CMD_STATS_AUTOFOCUS_CFG 0x0010
    +#define VFE_CMD_STATS_AUTOFOCUS_CFG_LEN \
    + sizeof(vfe_cmd_stats_autofocus_cfg)
    +
    +#define VFE_CMD_AF_STATS_SEL_STATS_DIS 0x0000
    +#define VFE_CMD_AF_STATS_SEL_STATS_ENA 0x0001
    +#define VFE_CMD_AF_STATS_SEL_PRI_FIXED 0x0000
    +#define VFE_CMD_AF_STATS_SEL_PRI_VAR 0x0002
    +#define VFE_CMD_AF_STATS_CFG_PART_METRIC_SUM 0x00000000
    +#define VFE_CMD_AF_STATS_CFG_PART_METRIC_MAX 0x00200000
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int af_stats_sel;
    + unsigned int af_stats_cfg_part[8];
    + unsigned int af_stats_op_buf_hdr;
    + unsigned int af_stats_op_buf[3];
    +} __attribute__((packed)) vfe_cmd_stats_autofocus_cfg;
    +
    +
    +/*
    + * Command to program White balance(wb) and exposure (exp)
    + * statistics module
    + */
    +
    +#define VFE_CMD_STATS_WB_EXP_CFG 0x0011
    +#define VFE_CMD_STATS_WB_EXP_CFG_LEN \
    + sizeof(vfe_cmd_stats_wb_exp_cfg)
    +
    +#define VFE_CMD_WB_EXP_STATS_SEL_STATS_DIS 0x0000
    +#define VFE_CMD_WB_EXP_STATS_SEL_STATS_ENA 0x0001
    +#define VFE_CMD_WB_EXP_STATS_SEL_PRI_FIXED 0x0000
    +#define VFE_CMD_WB_EXP_STATS_SEL_PRI_VAR 0x0002
    +
    +#define VFE_CMD_WB_EXP_STATS_CFG_PART1_EXP_REG_8_8 0x0000
    +#define VFE_CMD_WB_EXP_STATS_CFG_PART1_EXP_REG_16_16 0x0001
    +#define VFE_CMD_WB_EXP_STATS_CFG_PART1_EXP_SREG_8_8 0x0000
    +#define VFE_CMD_WB_EXP_STATS_CFG_PART1_EXP_SREG_4_4 0x0002
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int wb_exp_stats_sel;
    + unsigned int wb_exp_stats_cfg_part1;
    + unsigned int wb_exp_stats_cfg_part2;
    + unsigned int wb_exp_stats_cfg_part3;
    + unsigned int wb_exp_stats_cfg_part4;
    + unsigned int wb_exp_stats_op_buf_hdr;
    + unsigned int wb_exp_stats_op_buf[3];
    +} __attribute__((packed)) vfe_cmd_stats_wb_exp_cfg;
    +
    +
    +/*
    + * Command to program histogram(hg) stats module
    + */
    +
    +#define VFE_CMD_STATS_HG_CFG 0x0012
    +#define VFE_CMD_STATS_HG_CFG_LEN \
    + sizeof(vfe_cmd_stats_hg_cfg)
    +
    +#define VFE_CMD_HG_STATS_SEL_PRI_FIXED 0x0000
    +#define VFE_CMD_HG_STATS_SEL_PRI_VAR 0x0002
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int hg_stats_sel;
    + unsigned int hg_stats_cfg_part1;
    + unsigned int hg_stats_cfg_part2;
    + unsigned int hg_stats_op_buf_hdr;
    + unsigned int hg_stats_op_buf;
    +} __attribute__((packed)) vfe_cmd_stats_hg_cfg;
    +
    +
    +/*
    + * Command to acknowledge last MSG_VFE_OP1 message
    + */
    +
    +#define VFE_CMD_OP1_ACK 0x0013
    +#define VFE_CMD_OP1_ACK_LEN sizeof(vfe_cmd_op1_ack)
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int op1_buf_y_addr;
    + unsigned int op1_buf_cbcr_addr;
    +} __attribute__((packed)) vfe_cmd_op1_ack;
    +
    +
    +
    +/*
    + * Command to acknowledge last MSG_VFE_OP2 message
    + */
    +
    +#define VFE_CMD_OP2_ACK 0x0014
    +#define VFE_CMD_OP2_ACK_LEN sizeof(vfe_cmd_op2_ack)
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int op2_buf_y_addr;
    + unsigned int op2_buf_cbcr_addr;
    +} __attribute__((packed)) vfe_cmd_op2_ack;
    +
    +
    +
    +/*
    + * Command to acknowledge MSG_VFE_STATS_AUTOFOCUS msg
    + */
    +
    +#define VFE_CMD_STATS_AF_ACK 0x0015
    +#define VFE_CMD_STATS_AF_ACK_LEN sizeof(vfe_cmd_stats_af_ack)
    +
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int af_stats_op_buf;
    +} __attribute__((packed)) vfe_cmd_stats_af_ack;
    +
    +
    +/*
    + * Command to acknowledge MSG_VFE_STATS_WB_EXP msg
    + */
    +
    +#define VFE_CMD_STATS_WB_EXP_ACK 0x0016
    +#define VFE_CMD_STATS_WB_EXP_ACK_LEN sizeof(vfe_cmd_stats_wb_exp_ack)
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int wb_exp_stats_op_buf;
    +} __attribute__((packed)) vfe_cmd_stats_wb_exp_ack;
    +
    +
    +/*
    + * Command to acknowledge MSG_VFE_EPOCH1 message
    + */
    +
    +#define VFE_CMD_EPOCH1_ACK 0x0017
    +#define VFE_CMD_EPOCH1_ACK_LEN sizeof(vfe_cmd_epoch1_ack)
    +
    +typedef struct {
    + unsigned short cmd_id;
    +} __attribute__((packed)) vfe_cmd_epoch1_ack;
    +
    +
    +/*
    + * Command to acknowledge MSG_VFE_EPOCH2 message
    + */
    +
    +#define VFE_CMD_EPOCH2_ACK 0x0018
    +#define VFE_CMD_EPOCH2_ACK_LEN sizeof(vfe_cmd_epoch2_ack)
    +
    +typedef struct {
    + unsigned short cmd_id;
    +} __attribute__((packed)) vfe_cmd_epoch2_ack;
    +
    +
    +
    +/*
    + * Command to configure, enable or disable synchronous timer1
    + */
    +
    +#define VFE_CMD_SYNC_TIMER1_CFG 0x0019
    +#define VFE_CMD_SYNC_TIMER1_CFG_LEN \
    + sizeof(vfe_cmd_sync_timer1_cfg)
    +
    +#define VFE_CMD_SYNC_T1_CFG_PART1_TIMER_DIS 0x0000
    +#define VFE_CMD_SYNC_T1_CFG_PART1_TIMER_ENA 0x0001
    +#define VFE_CMD_SYNC_T1_CFG_PART1_POL_HIGH 0x0000
    +#define VFE_CMD_SYNC_T1_CFG_PART1_POL_LOW 0x0002
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int sync_t1_cfg_part1;
    + unsigned int sync_t1_h_sync_countdown;
    + unsigned int sync_t1_pclk_countdown;
    + unsigned int sync_t1_duration;
    +} __attribute__((packed)) vfe_cmd_sync_timer1_cfg;
    +
    +
    +/*
    + * Command to configure, enable or disable synchronous timer1
    + */
    +
    +#define VFE_CMD_SYNC_TIMER2_CFG 0x001A
    +#define VFE_CMD_SYNC_TIMER2_CFG_LEN \
    + sizeof(vfe_cmd_sync_timer2_cfg)
    +
    +#define VFE_CMD_SYNC_T2_CFG_PART1_TIMER_DIS 0x0000
    +#define VFE_CMD_SYNC_T2_CFG_PART1_TIMER_ENA 0x0001
    +#define VFE_CMD_SYNC_T2_CFG_PART1_POL_HIGH 0x0000
    +#define VFE_CMD_SYNC_T2_CFG_PART1_POL_LOW 0x0002
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int sync_t2_cfg_part1;
    + unsigned int sync_t2_h_sync_countdown;
    + unsigned int sync_t2_pclk_countdown;
    + unsigned int sync_t2_duration;
    +} __attribute__((packed)) vfe_cmd_sync_timer2_cfg;
    +
    +
    +/*
    + * Command to configure and start asynchronous timer1
    + */
    +
    +#define VFE_CMD_ASYNC_TIMER1_START 0x001B
    +#define VFE_CMD_ASYNC_TIMER1_START_LEN \
    + sizeof(vfe_cmd_async_timer1_start)
    +
    +#define VFE_CMD_ASYNC_T1_POLARITY_A_HIGH 0x0000
    +#define VFE_CMD_ASYNC_T1_POLARITY_A_LOW 0x0001
    +#define VFE_CMD_ASYNC_T1_POLARITY_B_HIGH 0x0000
    +#define VFE_CMD_ASYNC_T1_POLARITY_B_LOW 0x0002
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int async_t1a_cfg;
    + unsigned int async_t1b_cfg;
    + unsigned int async_t1_polarity;
    +} __attribute__((packed)) vfe_cmd_async_timer1_start;
    +
    +
    +/*
    + * Command to configure and start asynchronous timer2
    + */
    +
    +#define VFE_CMD_ASYNC_TIMER2_START 0x001C
    +#define VFE_CMD_ASYNC_TIMER2_START_LEN \
    + sizeof(vfe_cmd_async_timer2_start)
    +
    +#define VFE_CMD_ASYNC_T2_POLARITY_A_HIGH 0x0000
    +#define VFE_CMD_ASYNC_T2_POLARITY_A_LOW 0x0001
    +#define VFE_CMD_ASYNC_T2_POLARITY_B_HIGH 0x0000
    +#define VFE_CMD_ASYNC_T2_POLARITY_B_LOW 0x0002
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int async_t2a_cfg;
    + unsigned int async_t2b_cfg;
    + unsigned int async_t2_polarity;
    +} __attribute__((packed)) vfe_cmd_async_timer2_start;
    +
    +
    +/*
    + * Command to program partial configurations of auto focus(af)
    + */
    +
    +#define VFE_CMD_STATS_AF_UPDATE 0x001D
    +#define VFE_CMD_STATS_AF_UPDATE_LEN \
    + sizeof(vfe_cmd_stats_af_update)
    +
    +#define VFE_CMD_AF_UPDATE_PART1_WINDOW_ONE 0x00000000
    +#define VFE_CMD_AF_UPDATE_PART1_WINDOW_MULTI 0x80000000
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int af_update_part1;
    + unsigned int af_update_part2;
    +} __attribute__((packed)) vfe_cmd_stats_af_update;
    +
    +
    +/*
    + * Command to program partial cfg of wb and exp
    + */
    +
    +#define VFE_CMD_STATS_WB_EXP_UPDATE 0x001E
    +#define VFE_CMD_STATS_WB_EXP_UPDATE_LEN \
    + sizeof(vfe_cmd_stats_wb_exp_update)
    +
    +#define VFE_CMD_WB_EXP_UPDATE_PART1_REGIONS_8_8 0x0000
    +#define VFE_CMD_WB_EXP_UPDATE_PART1_REGIONS_16_16 0x0001
    +#define VFE_CMD_WB_EXP_UPDATE_PART1_SREGIONS_8_8 0x0000
    +#define VFE_CMD_WB_EXP_UPDATE_PART1_SREGIONS_4_4 0x0002
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int wb_exp_update_part1;
    + unsigned int wb_exp_update_part2;
    + unsigned int wb_exp_update_part3;
    + unsigned int wb_exp_update_part4;
    +} __attribute__((packed)) vfe_cmd_stats_wb_exp_update;
    +
    +
    +
    +/*
    + * Command to re program the CAMIF FRAME CONFIG settings
    + */
    +
    +#define VFE_CMD_UPDATE_CAMIF_FRAME_CFG 0x001F
    +#define VFE_CMD_UPDATE_CAMIF_FRAME_CFG_LEN \
    + sizeof(vfe_cmd_update_camif_frame_cfg)
    +
    +typedef struct {
    + unsigned int cmd_id;
    + unsigned int camif_frame_cfg;
    +} __attribute__((packed)) vfe_cmd_update_camif_frame_cfg;
    +
    +
    +#endif
    diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5vfemsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5vfemsg.h
    new file mode 100644
    index 0000000..0053cfb
    --- /dev/null
    +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5vfemsg.h
    @@ -0,0 +1,290 @@
    +#ifndef QDSP5VFEMSGI_H
    +#define QDSP5VFEMSGI_H
    +
    +/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*
    +
    + V F E I N T E R N A L M E S S A G E S
    +
    +GENERAL DESCRIPTION
    + This file contains defintions of format blocks of commands
    + that are sent by VFE Task
    +
    +REFERENCES
    + None
    +
    +EXTERNALIZED FUNCTIONS
    + None
    +
    +Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated.
    +
    +This software is licensed under the terms of the GNU General Public
    +License version 2, as published by the Free Software Foundation, and
    +may be copied, distributed, and modified under those terms.
    +
    +This program is distributed in the hope that it will be useful,
    +but WITHOUT ANY WARRANTY; without even the implied warranty of
    +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    +GNU General Public License for more details.
    +
    +*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
    +/*===========================================================================
    +
    + EDIT HISTORY FOR FILE
    +
    +This section contains comments describing changes made to this file.
    +Notice that changes are listed in reverse chronological order.
    +
    +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vfemsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $
    +Revision History:
    +
    +when who what, where, why
    +-------- --- ----------------------------------------------------------
    +06/12/08 sv initial version
    +===========================================================================*/
    +
    +
    +/*
    + * Message to acknowledge CMD_VFE_REST command
    + */
    +
    +#define VFE_MSG_RESET_ACK 0x0000
    +#define VFE_MSG_RESET_ACK_LEN sizeof(vfe_msg_reset_ack)
    +
    +typedef struct {
    +} __attribute__((packed)) vfe_msg_reset_ack;
    +
    +
    +/*
    + * Message to acknowledge CMD_VFE_START command
    + */
    +
    +#define VFE_MSG_START_ACK 0x0001
    +#define VFE_MSG_START_ACK_LEN sizeof(vfe_msg_start_ack)
    +
    +typedef struct {
    +} __attribute__((packed)) vfe_msg_start_ack;
    +
    +/*
    + * Message to acknowledge CMD_VFE_STOP command
    + */
    +
    +#define VFE_MSG_STOP_ACK 0x0002
    +#define VFE_MSG_STOP_ACK_LEN sizeof(vfe_msg_stop_ack)
    +
    +typedef struct {
    +} __attribute__((packed)) vfe_msg_stop_ack;
    +
    +
    +/*
    + * Message to acknowledge CMD_VFE_UPDATE command
    + */
    +
    +#define VFE_MSG_UPDATE_ACK 0x0003
    +#define VFE_MSG_UPDATE_ACK_LEN sizeof(vfe_msg_update_ack)
    +
    +typedef struct {
    +} __attribute__((packed)) vfe_msg_update_ack;
    +
    +
    +/*
    + * Message to notify the ARM that snapshot processing is complete
    + * and that the VFE is now STATE_VFE_IDLE
    + */
    +
    +#define VFE_MSG_SNAPSHOT_DONE 0x0004
    +#define VFE_MSG_SNAPSHOT_DONE_LEN \
    + sizeof(vfe_msg_snapshot_done)
    +
    +typedef struct {
    +} __attribute__((packed)) vfe_msg_snapshot_done;
    +
    +
    +
    +/*
    + * Message to notify ARM that illegal cmd was received and
    + * system is in the IDLE state
    + */
    +
    +#define VFE_MSG_ILLEGAL_CMD 0x0005
    +#define VFE_MSG_ILLEGAL_CMD_LEN \
    + sizeof(vfe_msg_illegal_cmd)
    +
    +typedef struct {
    + unsigned int status;
    +} __attribute__((packed)) vfe_msg_illegal_cmd;
    +
    +
    +/*
    + * Message to notify ARM that op1 buf is full and ready
    + */
    +
    +#define VFE_MSG_OP1 0x0006
    +#define VFE_MSG_OP1_LEN sizeof(vfe_msg_op1)
    +
    +typedef struct {
    + unsigned int op1_buf_y_addr;
    + unsigned int op1_buf_cbcr_addr;
    + unsigned int black_level_even_col;
    + unsigned int black_level_odd_col;
    + unsigned int defect_pixels_detected;
    + unsigned int asf_max_edge;
    +} __attribute__((packed)) vfe_msg_op1;
    +
    +
    +/*
    + * Message to notify ARM that op2 buf is full and ready
    + */
    +
    +#define VFE_MSG_OP2 0x0007
    +#define VFE_MSG_OP2_LEN sizeof(vfe_msg_op2)
    +
    +typedef struct {
    + unsigned int op2_buf_y_addr;
    + unsigned int op2_buf_cbcr_addr;
    + unsigned int black_level_even_col;
    + unsigned int black_level_odd_col;
    + unsigned int defect_pixels_detected;
    + unsigned int asf_max_edge;
    +} __attribute__((packed)) vfe_msg_op2;
    +
    +
    +/*
    + * Message to notify ARM that autofocus(af) stats are ready
    + */
    +
    +#define VFE_MSG_STATS_AF 0x0008
    +#define VFE_MSG_STATS_AF_LEN sizeof(vfe_msg_stats_af)
    +
    +typedef struct {
    + unsigned int af_stats_op_buffer;
    +} __attribute__((packed)) vfe_msg_stats_af;
    +
    +
    +/*
    + * Message to notify ARM that white balance(wb) and exposure (exp)
    + * stats are ready
    + */
    +
    +#define VFE_MSG_STATS_WB_EXP 0x0009
    +#define VFE_MSG_STATS_WB_EXP_LEN \
    + sizeof(vfe_msg_stats_wb_exp)
    +
    +typedef struct {
    + unsigned int wb_exp_stats_op_buf;
    +} __attribute__((packed)) vfe_msg_stats_wb_exp;
    +
    +
    +/*
    + * Message to notify the ARM that histogram(hg) stats are ready
    + */
    +
    +#define VFE_MSG_STATS_HG 0x000A
    +#define VFE_MSG_STATS_HG_LEN sizeof(vfe_msg_stats_hg)
    +
    +typedef struct {
    + unsigned int hg_stats_op_buf;
    +} __attribute__((packed)) vfe_msg_stats_hg;
    +
    +
    +/*
    + * Message to notify the ARM that epoch1 event occurred in the CAMIF
    + */
    +
    +#define VFE_MSG_EPOCH1 0x000B
    +#define VFE_MSG_EPOCH1_LEN sizeof(vfe_msg_epoch1)
    +
    +typedef struct {
    +} __attribute__((packed)) vfe_msg_epoch1;
    +
    +
    +/*
    + * Message to notify the ARM that epoch2 event occurred in the CAMIF
    + */
    +
    +#define VFE_MSG_EPOCH2 0x000C
    +#define VFE_MSG_EPOCH2_LEN sizeof(vfe_msg_epoch2)
    +
    +typedef struct {
    +} __attribute__((packed)) vfe_msg_epoch2;
    +
    +
    +/*
    + * Message to notify the ARM that sync timer1 op is completed
    + */
    +
    +#define VFE_MSG_SYNC_T1_DONE 0x000D
    +#define VFE_MSG_SYNC_T1_DONE_LEN sizeof(vfe_msg_sync_t1_done)
    +
    +typedef struct {
    +} __attribute__((packed)) vfe_msg_sync_t1_done;
    +
    +
    +/*
    + * Message to notify the ARM that sync timer2 op is completed
    + */
    +
    +#define VFE_MSG_SYNC_T2_DONE 0x000E
    +#define VFE_MSG_SYNC_T2_DONE_LEN sizeof(vfe_msg_sync_t2_done)
    +
    +typedef struct {
    +} __attribute__((packed)) vfe_msg_sync_t2_done;
    +
    +
    +/*
    + * Message to notify the ARM that async t1 operation completed
    + */
    +
    +#define VFE_MSG_ASYNC_T1_DONE 0x000F
    +#define VFE_MSG_ASYNC_T1_DONE_LEN sizeof(vfe_msg_async_t1_done)
    +
    +typedef struct {
    +} __attribute__((packed)) vfe_msg_async_t1_done;
    +
    +
    +
    +/*
    + * Message to notify the ARM that async t2 operation completed
    + */
    +
    +#define VFE_MSG_ASYNC_T2_DONE 0x0010
    +#define VFE_MSG_ASYNC_T2_DONE_LEN sizeof(vfe_msg_async_t2_done)
    +
    +typedef struct {
    +} __attribute__((packed)) vfe_msg_async_t2_done;
    +
    +
    +
    +/*
    + * Message to notify the ARM that an error has occurred
    + */
    +
    +#define VFE_MSG_ERROR 0x0011
    +#define VFE_MSG_ERROR_LEN sizeof(vfe_msg_error)
    +
    +#define VFE_MSG_ERR_COND_NO_CAMIF_ERR 0x0000
    +#define VFE_MSG_ERR_COND_CAMIF_ERR 0x0001
    +#define VFE_MSG_ERR_COND_OP1_Y_NO_BUS_OF 0x0000
    +#define VFE_MSG_ERR_COND_OP1_Y_BUS_OF 0x0002
    +#define VFE_MSG_ERR_COND_OP1_CBCR_NO_BUS_OF 0x0000
    +#define VFE_MSG_ERR_COND_OP1_CBCR_BUS_OF 0x0004
    +#define VFE_MSG_ERR_COND_OP2_Y_NO_BUS_OF 0x0000
    +#define VFE_MSG_ERR_COND_OP2_Y_BUS_OF 0x0008
    +#define VFE_MSG_ERR_COND_OP2_CBCR_NO_BUS_OF 0x0000
    +#define VFE_MSG_ERR_COND_OP2_CBCR_BUS_OF 0x0010
    +#define VFE_MSG_ERR_COND_AF_NO_BUS_OF 0x0000
    +#define VFE_MSG_ERR_COND_AF_BUS_OF 0x0020
    +#define VFE_MSG_ERR_COND_WB_EXP_NO_BUS_OF 0x0000
    +#define VFE_MSG_ERR_COND_WB_EXP_BUS_OF 0x0040
    +#define VFE_MSG_ERR_COND_NO_AXI_ERR 0x0000
    +#define VFE_MSG_ERR_COND_AXI_ERR 0x0080
    +
    +#define VFE_MSG_CAMIF_STS_IDLE 0x0000
    +#define VFE_MSG_CAMIF_STS_CAPTURE_DATA 0x0001
    +
    +typedef struct {
    + unsigned int err_cond;
    + unsigned int camif_sts;
    +} __attribute__((packed)) vfe_msg_error;
    +
    +
    +#endif
    diff --git a/drivers/staging/dream/include/media/msm_camera.h b/drivers/staging/dream/include/media/msm_camera.h
    new file mode 100644
    index 0000000..09812d6
    --- /dev/null
    +++ b/drivers/staging/dream/include/media/msm_camera.h
    @@ -0,0 +1,388 @@
    +/*
    + * Copyright (C) 2008-2009 QUALCOMM Incorporated.
    + */
    +#ifndef __LINUX_MSM_CAMERA_H
    +#define __LINUX_MSM_CAMERA_H
    +
    +#include <linux/types.h>
    +#include <asm/sizes.h>
    +#include <linux/ioctl.h>
    +
    +#define MSM_CAM_IOCTL_MAGIC 'm'
    +
    +#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
    + _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
    +
    +#define MSM_CAM_IOCTL_REGISTER_PMEM \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
    +
    +#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
    +
    +#define MSM_CAM_IOCTL_CTRL_COMMAND \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
    +
    +#define MSM_CAM_IOCTL_CONFIG_VFE \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
    +
    +#define MSM_CAM_IOCTL_GET_STATS \
    + _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
    +
    +#define MSM_CAM_IOCTL_GETFRAME \
    + _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
    +
    +#define MSM_CAM_IOCTL_ENABLE_VFE \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
    +
    +#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
    +
    +#define MSM_CAM_IOCTL_CONFIG_CMD \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
    +
    +#define MSM_CAM_IOCTL_DISABLE_VFE \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
    +
    +#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
    +
    +#define MSM_CAM_IOCTL_VFE_APPS_RESET \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
    +
    +#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
    +
    +#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
    +
    +#define MSM_CAM_IOCTL_AXI_CONFIG \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
    +
    +#define MSM_CAM_IOCTL_GET_PICTURE \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_camera_ctrl_cmd *)
    +
    +#define MSM_CAM_IOCTL_SET_CROP \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
    +
    +#define MSM_CAM_IOCTL_PICT_PP \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
    +
    +#define MSM_CAM_IOCTL_PICT_PP_DONE \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
    +
    +#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
    +
    +#define MSM_CAMERA_LED_OFF 0
    +#define MSM_CAMERA_LED_LOW 1
    +#define MSM_CAMERA_LED_HIGH 2
    +
    +#define MSM_CAM_IOCTL_FLASH_LED_CFG \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
    +
    +#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
    + _IO(MSM_CAM_IOCTL_MAGIC, 23)
    +
    +#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
    + _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
    +
    +#define MAX_SENSOR_NUM 3
    +#define MAX_SENSOR_NAME 32
    +
    +#define MSM_CAM_CTRL_CMD_DONE 0
    +#define MSM_CAM_SENSOR_VFE_CMD 1
    +
    +/*****************************************************
    + * structure
    + *****************************************************/
    +
    +/* define five type of structures for userspace <==> kernel
    + * space communication:
    + * command 1 - 2 are from userspace ==> kernel
    + * command 3 - 4 are from kernel ==> userspace
    + *
    + * 1. control command: control command(from control thread),
    + * control status (from config thread);
    + */
    +struct msm_ctrl_cmd {
    + uint16_t type;
    + uint16_t length;
    + void *value;
    + uint16_t status;
    + uint32_t timeout_ms;
    + int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
    +};
    +
    +struct msm_vfe_evt_msg {
    + unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
    + unsigned short msg_id;
    + unsigned int len; /* size in, number of bytes out */
    + void *data;
    +};
    +
    +#define MSM_CAM_RESP_CTRL 0
    +#define MSM_CAM_RESP_STAT_EVT_MSG 1
    +#define MSM_CAM_RESP_V4L2 2
    +#define MSM_CAM_RESP_MAX 3
    +
    +/* this one is used to send ctrl/status up to config thread */
    +struct msm_stats_event_ctrl {
    + /* 0 - ctrl_cmd from control thread,
    + * 1 - stats/event kernel,
    + * 2 - V4L control or read request */
    + int resptype;
    + int timeout_ms;
    + struct msm_ctrl_cmd ctrl_cmd;
    + /* struct vfe_event_t stats_event; */
    + struct msm_vfe_evt_msg stats_event;
    +};
    +
    +/* 2. config command: config command(from config thread); */
    +struct msm_camera_cfg_cmd {
    + /* what to config:
    + * 1 - sensor config, 2 - vfe config */
    + uint16_t cfg_type;
    +
    + /* sensor config type */
    + uint16_t cmd_type;
    + uint16_t queue;
    + uint16_t length;
    + void *value;
    +};
    +
    +#define CMD_GENERAL 0
    +#define CMD_AXI_CFG_OUT1 1
    +#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
    +#define CMD_AXI_CFG_OUT2 3
    +#define CMD_PICT_T_AXI_CFG 4
    +#define CMD_PICT_M_AXI_CFG 5
    +#define CMD_RAW_PICT_AXI_CFG 6
    +#define CMD_STATS_AXI_CFG 7
    +#define CMD_STATS_AF_AXI_CFG 8
    +#define CMD_FRAME_BUF_RELEASE 9
    +#define CMD_PREV_BUF_CFG 10
    +#define CMD_SNAP_BUF_RELEASE 11
    +#define CMD_SNAP_BUF_CFG 12
    +#define CMD_STATS_DISABLE 13
    +#define CMD_STATS_ENABLE 14
    +#define CMD_STATS_AF_ENABLE 15
    +#define CMD_STATS_BUF_RELEASE 16
    +#define CMD_STATS_AF_BUF_RELEASE 17
    +#define UPDATE_STATS_INVALID 18
    +
    +/* vfe config command: config command(from config thread)*/
    +struct msm_vfe_cfg_cmd {
    + int cmd_type;
    + uint16_t length;
    + void *value;
    +};
    +
    +#define MAX_CAMERA_ENABLE_NAME_LEN 32
    +struct camera_enable_cmd {
    + char name[MAX_CAMERA_ENABLE_NAME_LEN];
    +};
    +
    +#define MSM_PMEM_OUTPUT1 0
    +#define MSM_PMEM_OUTPUT2 1
    +#define MSM_PMEM_OUTPUT1_OUTPUT2 2
    +#define MSM_PMEM_THUMBAIL 3
    +#define MSM_PMEM_MAINIMG 4
    +#define MSM_PMEM_RAW_MAINIMG 5
    +#define MSM_PMEM_AEC_AWB 6
    +#define MSM_PMEM_AF 7
    +#define MSM_PMEM_MAX 8
    +
    +#define FRAME_PREVIEW_OUTPUT1 0
    +#define FRAME_PREVIEW_OUTPUT2 1
    +#define FRAME_SNAPSHOT 2
    +#define FRAME_THUMBAIL 3
    +#define FRAME_RAW_SNAPSHOT 4
    +#define FRAME_MAX 5
    +
    +struct msm_pmem_info {
    + int type;
    + int fd;
    + void *vaddr;
    + uint32_t y_off;
    + uint32_t cbcr_off;
    + uint8_t active;
    +};
    +
    +struct outputCfg {
    + uint32_t height;
    + uint32_t width;
    +
    + uint32_t window_height_firstline;
    + uint32_t window_height_lastline;
    +};
    +
    +#define OUTPUT_1 0
    +#define OUTPUT_2 1
    +#define OUTPUT_1_AND_2 2
    +#define CAMIF_TO_AXI_VIA_OUTPUT_2 3
    +#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 4
    +#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 5
    +#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
    +
    +#define MSM_FRAME_PREV_1 0
    +#define MSM_FRAME_PREV_2 1
    +#define MSM_FRAME_ENC 2
    +
    +struct msm_frame {
    + int path;
    + unsigned long buffer;
    + uint32_t y_off;
    + uint32_t cbcr_off;
    + int fd;
    +
    + void *cropinfo;
    + int croplen;
    +};
    +
    +#define STAT_AEAW 0
    +#define STAT_AF 1
    +#define STAT_MAX 2
    +
    +struct msm_stats_buf {
    + int type;
    + unsigned long buffer;
    + int fd;
    +};
    +
    +#define MSM_V4L2_VID_CAP_TYPE 0
    +#define MSM_V4L2_STREAM_ON 1
    +#define MSM_V4L2_STREAM_OFF 2
    +#define MSM_V4L2_SNAPSHOT 3
    +#define MSM_V4L2_QUERY_CTRL 4
    +#define MSM_V4L2_GET_CTRL 5
    +#define MSM_V4L2_SET_CTRL 6
    +#define MSM_V4L2_QUERY 7
    +#define MSM_V4L2_MAX 8
    +
    +struct crop_info {
    + void *info;
    + int len;
    +};
    +
    +struct msm_postproc {
    + int ftnum;
    + struct msm_frame fthumnail;
    + int fmnum;
    + struct msm_frame fmain;
    +};
    +
    +struct msm_snapshot_pp_status {
    + void *status;
    +};
    +
    +#define CFG_SET_MODE 0
    +#define CFG_SET_EFFECT 1
    +#define CFG_START 2
    +#define CFG_PWR_UP 3
    +#define CFG_PWR_DOWN 4
    +#define CFG_WRITE_EXPOSURE_GAIN 5
    +#define CFG_SET_DEFAULT_FOCUS 6
    +#define CFG_MOVE_FOCUS 7
    +#define CFG_REGISTER_TO_REAL_GAIN 8
    +#define CFG_REAL_TO_REGISTER_GAIN 9
    +#define CFG_SET_FPS 10
    +#define CFG_SET_PICT_FPS 11
    +#define CFG_SET_BRIGHTNESS 12
    +#define CFG_SET_CONTRAST 13
    +#define CFG_SET_ZOOM 14
    +#define CFG_SET_EXPOSURE_MODE 15
    +#define CFG_SET_WB 16
    +#define CFG_SET_ANTIBANDING 17
    +#define CFG_SET_EXP_GAIN 18
    +#define CFG_SET_PICT_EXP_GAIN 19
    +#define CFG_SET_LENS_SHADING 20
    +#define CFG_GET_PICT_FPS 21
    +#define CFG_GET_PREV_L_PF 22
    +#define CFG_GET_PREV_P_PL 23
    +#define CFG_GET_PICT_L_PF 24
    +#define CFG_GET_PICT_P_PL 25
    +#define CFG_GET_AF_MAX_STEPS 26
    +#define CFG_GET_PICT_MAX_EXP_LC 27
    +#define CFG_MAX 28
    +
    +#define MOVE_NEAR 0
    +#define MOVE_FAR 1
    +
    +#define SENSOR_PREVIEW_MODE 0
    +#define SENSOR_SNAPSHOT_MODE 1
    +#define SENSOR_RAW_SNAPSHOT_MODE 2
    +
    +#define SENSOR_QTR_SIZE 0
    +#define SENSOR_FULL_SIZE 1
    +#define SENSOR_INVALID_SIZE 2
    +
    +#define CAMERA_EFFECT_OFF 0
    +#define CAMERA_EFFECT_MONO 1
    +#define CAMERA_EFFECT_NEGATIVE 2
    +#define CAMERA_EFFECT_SOLARIZE 3
    +#define CAMERA_EFFECT_PASTEL 4
    +#define CAMERA_EFFECT_MOSAIC 5
    +#define CAMERA_EFFECT_RESIZE 6
    +#define CAMERA_EFFECT_SEPIA 7
    +#define CAMERA_EFFECT_POSTERIZE 8
    +#define CAMERA_EFFECT_WHITEBOARD 9
    +#define CAMERA_EFFECT_BLACKBOARD 10
    +#define CAMERA_EFFECT_AQUA 11
    +#define CAMERA_EFFECT_MAX 12
    +
    +struct sensor_pict_fps {
    + uint16_t prevfps;
    + uint16_t pictfps;
    +};
    +
    +struct exp_gain_cfg {
    + uint16_t gain;
    + uint32_t line;
    +};
    +
    +struct focus_cfg {
    + int32_t steps;
    + int dir;
    +};
    +
    +struct fps_cfg {
    + uint16_t f_mult;
    + uint16_t fps_div;
    + uint32_t pict_fps_div;
    +};
    +
    +struct sensor_cfg_data {
    + int cfgtype;
    + int mode;
    + int rs;
    + uint8_t max_steps;
    +
    + union {
    + int8_t effect;
    + uint8_t lens_shading;
    + uint16_t prevl_pf;
    + uint16_t prevp_pl;
    + uint16_t pictl_pf;
    + uint16_t pictp_pl;
    + uint32_t pict_max_exp_lc;
    + uint16_t p_fps;
    + struct sensor_pict_fps gfps;
    + struct exp_gain_cfg exp_gain;
    + struct focus_cfg focus;
    + struct fps_cfg fps;
    + } cfg;
    +};
    +
    +#define GET_NAME 0
    +#define GET_PREVIEW_LINE_PER_FRAME 1
    +#define GET_PREVIEW_PIXELS_PER_LINE 2
    +#define GET_SNAPSHOT_LINE_PER_FRAME 3
    +#define GET_SNAPSHOT_PIXELS_PER_LINE 4
    +#define GET_SNAPSHOT_FPS 5
    +#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
    +
    +struct msm_camsensor_info {
    + char name[MAX_SENSOR_NAME];
    + uint8_t flash_enabled;
    +};
    +#endif /* __LINUX_MSM_CAMERA_H */
    diff --git a/drivers/staging/dream/qdsp5/Makefile b/drivers/staging/dream/qdsp5/Makefile
    index 991d4a7..beedaaf 100644
    --- a/drivers/staging/dream/qdsp5/Makefile
    +++ b/drivers/staging/dream/qdsp5/Makefile
    @@ -1,3 +1,4 @@
    +EXTRA_CFLAGS=-Idrivers/staging/dream/include
    obj-y += adsp.o
    ifeq ($(CONFIG_MSM_AMSS_VERSION_6350),y)
    obj-y += adsp_info.o
    diff --git a/drivers/staging/dream/smd/Makefile b/drivers/staging/dream/smd/Makefile
    index 892c741..1c87618 100644
    --- a/drivers/staging/dream/smd/Makefile
    +++ b/drivers/staging/dream/smd/Makefile
    @@ -1,3 +1,4 @@
    +EXTRA_CFLAGS=-Idrivers/staging/dream/include
    obj-$(CONFIG_MSM_SMD) += smd.o smd_tty.o smd_qmi.o
    obj-$(CONFIG_MSM_ONCRPCROUTER) += smd_rpcrouter.o
    obj-$(CONFIG_MSM_ONCRPCROUTER) += smd_rpcrouter_device.o
    diff --git a/include/linux/msm_mdp.h b/include/linux/msm_mdp.h
    new file mode 100644
    index 0000000..9065dc6
    --- /dev/null
    +++ b/include/linux/msm_mdp.h
    @@ -0,0 +1,86 @@
    +/* include/linux/msm_mdp.h
    + *
    + * Copyright (C) 2007 Google Incorporated
    + *
    + * This software is licensed under the terms of the GNU General Public
    + * License version 2, as published by the Free Software Foundation, and
    + * may be copied, distributed, and modified under those terms.
    + *
    + * This program is distributed in the hope that it will be useful,
    + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
    + * GNU General Public License for more details.
    + */
    +#ifndef _MSM_MDP_H_
    +#define _MSM_MDP_H_
    +
    +#include <linux/types.h>
    +
    +#define MSMFB_IOCTL_MAGIC 'm'
    +#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int)
    +#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int)
    +
    +enum {
    + MDP_RGB_565, // RGB 565 planer
    + MDP_XRGB_8888, // RGB 888 padded
    + MDP_Y_CBCR_H2V2, // Y and CbCr, pseudo planer w/ Cb is in MSB
    + MDP_ARGB_8888, // ARGB 888
    + MDP_RGB_888, // RGB 888 planer
    + MDP_Y_CRCB_H2V2, // Y and CrCb, pseudo planer w/ Cr is in MSB
    + MDP_YCRYCB_H2V1, // YCrYCb interleave
    + MDP_Y_CRCB_H2V1, // Y and CrCb, pseduo planer w/ Cr is in MSB
    + MDP_Y_CBCR_H2V1, // Y and CrCb, pseduo planer w/ Cr is in MSB
    + MDP_RGBA_8888, // ARGB 888
    + MDP_BGRA_8888, // ARGB 888
    + MDP_IMGTYPE_LIMIT // Non valid image type after this enum
    +};
    +
    +enum {
    + PMEM_IMG,
    + FB_IMG,
    +};
    +
    +/* flag values */
    +#define MDP_ROT_NOP 0
    +#define MDP_FLIP_LR 0x1
    +#define MDP_FLIP_UD 0x2
    +#define MDP_ROT_90 0x4
    +#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR)
    +#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR)
    +#define MDP_DITHER 0x8
    +#define MDP_BLUR 0x10
    +
    +#define MDP_TRANSP_NOP 0xffffffff
    +#define MDP_ALPHA_NOP 0xff
    +
    +struct mdp_rect {
    + uint32_t x;
    + uint32_t y;
    + uint32_t w;
    + uint32_t h;
    +};
    +
    +struct mdp_img {
    + uint32_t width;
    + uint32_t height;
    + uint32_t format;
    + uint32_t offset;
    + int memory_id; /* the file descriptor */
    +};
    +
    +struct mdp_blit_req {
    + struct mdp_img src;
    + struct mdp_img dst;
    + struct mdp_rect src_rect;
    + struct mdp_rect dst_rect;
    + uint32_t alpha;
    + uint32_t transp_mask;
    + uint32_t flags;
    +};
    +
    +struct mdp_blit_req_list {
    + uint32_t count;
    + struct mdp_blit_req req[];
    +};
    +
    +#endif //_MSM_MDP_H_
    --
    (english) http://www.livejournal.com/~pavelmachek
    (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html


    --
    (english) http://www.livejournal.com/~pavelmachek
    (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html


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