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SubjectRe: [X86] PCI: Use generic cacheline sizing instead of per-vendor tests.
On Wed, Oct 14, 2009 at 02:30:54PM -0700, Jesse Barnes wrote:
> On Wed, 14 Oct 2009 16:31:39 -0400
> Dave Jones <davej@redhat.com> wrote:
>
> > Instead of the PCI code needing to have code to determine the
> > cacheline size of each processor, use the data the cpu identification
> > code should have already determined during early boot.
> >
> > (The vendor checks are also incomplete, and don't take into account
> > modern CPUs)
> >
> > I've been carrying a variant of this code in Fedora for a while,
> > that prints debug information. There are a number of cases where we
> > are currently setting the PCI cacheline size to 32 bytes, when the CPU
> > cacheline size is 64 bytes. With this patch, we set them both the
> > same.
> >
> > Signed-off-by: Dave Jones <davej@redhat.com>
> >
>
> Does this improve performance enough to warrant putting it into the
> current cycle? Or is queuing it for 2.6.33 sufficient?

I haven't done any performance testing with/without. My intentions
were purely from a correctness standpoint.

It's not critical, and we've lived with this bug for a long time,
so waiting is fine.

Dave



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