Messages in this thread Patch in this message | | | Date | Thu, 01 Oct 2009 18:16:48 -0700 | From | Greg KH <> | Subject | [060/136] drm/i915: Fix typo for wrong LVDS clock setting on IGDNG |
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2.6.31-stable review patch. If anyone has any objections, please let us know.
------------------ From: Zhenyu Wang <zhenyuw@linux.intel.com>
commit b09aea7fb38f328c02e9f9b79617cabed02455e4 upstream.
New register for PCH LVDS on IGDNG should be used. This is a copy-n-paste typo. This fixes possible dual channel LVDS panel failure on IGDNG.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
--- drivers/gpu/drm/i915/intel_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -818,7 +818,7 @@ intel_igdng_find_best_PLL(const intel_li refclk, best_clock); if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { - if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) == + if ((I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP) clock.p2 = limit->p2.p2_fast; else
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