Messages in this thread | | | Date | Mon, 5 Jan 2009 11:31:57 -0700 | From | "Dan Williams" <> | Subject | Re: [PATCH] dmatest: flush and invalidate destination buffer before DMA |
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On Sun, Dec 28, 2008 at 10:53 AM, Atsushi Nemoto <anemo@mba.ocn.ne.jp> wrote: > On Sat, 27 Dec 2008 11:10:37 +0100, Haavard Skinnemoen <haavard.skinnemoen@atmel.com> wrote: >> Atsushi Nemoto wrote: >> > @@ -226,6 +227,12 @@ static int dmatest_func(void *data) >> > >> > dmatest_init_srcbuf(thread->srcbuf, src_off, len); >> > dmatest_init_dstbuf(thread->dstbuf, dst_off, len); >> > + /* flush and invalidate caches for whole dstbuf */ >> > + dma_dest = dma_map_single(chan->device->dev, >> > + thread->dstbuf, >> > + test_buf_size, DMA_BIDIRECTIONAL); >> > + dma_unmap_single(chan->device->dev, dma_dest, >> > + test_buf_size, DMA_BIDIRECTIONAL); >> >> You're supposed to unmap after the DMA operation is done, not before >> it's submitted. >> >> In this case, the DMA engine framework will do the unmapping for you >> (probably using the wrong primitive, but they're really all the same in >> practice, right?) so you can just drop the unmap call. > > Well, let me explain more. > > On nono-coherent MIPS platforms, dma_map_single() for DMA_TO_DEVICE > writeback the cache, dma_map_single() for DMA_FROM_DEVICE invalidated > (without writeback) the cache. dma_unmap_simgle() is a nop. > > If dst_off was not cacheline aligned, dma_map_single(..., > DMA_FROM_DEVICE) in dma_async_memcpy_buf_to_buf() invalidate whole > cachelines including dst_off. So, for example, the initialized data > at dst_off - 1 will be just discarded. This result mismatch error of > course. Same error can be happen at end of the real DMA area. > > I added dma_map_single/dma_unmap_single to just flush all dstbuf to > main memory. >
I am tempted to say this is a bug in the MIPS dma_map_single implementation. It is at least a difference in behavior from ARM where partial cachelines are cleaned+invalidated in the DMA_FROM_DEVICE case [1].
-- Dan
[1] http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=arch/arm/mm/cache-xsc3l2.c#l82
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