Messages in this thread | | | Date | Thu, 29 Jan 2009 22:47:40 -0700 (MST) | From | Paul Walmsley <> | Subject | Re: [PATCH C 06/13] OMAP3 clock: DPLLs should enter bypass if new rate is sys_ck |
| |
Hello Russell,
this E-mail responds to your comments on patches C 04 through C 08. My understanding is that you'd like me to:
1. Compress patches C 04 through C 09;
2. Modify omap3_noncore_dpll_enable() to move the "if (!ret) clk->rate = rate" outside and below the conditional;
3. Remove some of the blank lines before and after braces in C 06;
4. Modify the DPLL bypass clock handling to change the DPLL's clk->parent, rather than return the bypass clock rate.
The above all make sense to me, and #4, if it works in practice, should be a significant improvement over the existing code.
If this is what you're looking for, I'll send a compressed, modified patch. Would you like it to be based on the codebase post C 03, or against another commit?
regards,
- Paul
| |