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SubjectRe: [PATCH C 05/13] OMAP2/3 clock: fix DPLL rate calculation
On Wed, Jan 28, 2009 at 12:08:23PM -0700, Paul Walmsley wrote:
> + if (cpu_is_omap24xx()) {
> +
> + if (v == OMAP2XXX_EN_DPLL_LPBYPASS ||
> + v == OMAP2XXX_EN_DPLL_FRBYPASS)
> + return clk->parent->rate;
> +
> + } else if (cpu_is_omap34xx()) {
> +
> + if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
> + v == OMAP3XXX_EN_DPLL_FRBYPASS)
> + return dd->bypass_clk->rate;
> +
> + }

You shouldn't introduce two ways of doing the same thing. Make both
OMAP2 and OMAP3 behaviour the same so that you have less to think
about when looking at the code.

Also, when accepting patches, try to make sure that they conform to
the coding style, rather than repeatedly committing noisy coding style
cleanup patches.

So, the above should be:

+ if (cpu_is_omap24xx()) {
+ if (v == OMAP2XXX_EN_DPLL_LPBYPASS ||
+ v == OMAP2XXX_EN_DPLL_FRBYPASS)
+ return dd->bypass_clk->rate;
+ } else if (cpu_is_omap34xx()) {
+ if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
+ v == OMAP3XXX_EN_DPLL_FRBYPASS)
+ return dd->bypass_clk->rate;
+ }
And this patch should be combined with the previous one which creates
the whole 'bypass_clk' thing. There's not much point to a patch which
just adds an unused field and initializers to a structure.


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