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    SubjectRe: HPET regression in 2.6.26 versus 2.6.25 -- found another user with the same regression
    On 12/09/08 19:39 +0200, Andreas Herrmann wrote:
    > On Sat, Aug 23, 2008 at 02:05:19PM -0700, Yinghai Lu wrote:
    > > Jordan, or others for AMD could access SB600
    > > can you check ATI SB600 doc to produce one quirks patch to set the
    > > magic bit to hide 00:14.0 BAR1 to OS ?
    >
    > I know this is a very late reply, but
    > is there still a quirk desired to hide BAR1 of SB600 SMBus device?
    >
    > If yes, I'll provide a patch asap.

    I sent one up last week, but it was overshadowed by the much
    more serious R790 problem that Linus and Rafael was looking
    at. I have re-attached the patch for posterity.

    Thanks,
    Jordan

    --
    Jordan Crouse
    Systems Software Development Engineer
    Advanced Micro Devices, Inc.
    [PATCH]: SB600 - remove HPET resources from PCI device

    From: Jordan Crouse <jordan.crouse@amd.com>

    Prevent the HPET resources from appearing in PCI device 14.0 which
    confuses the PCI resource engine.

    Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
    ---

    arch/x86/pci/fixup.c | 27 +++++++++++++++++++++++++++
    1 files changed, 27 insertions(+), 0 deletions(-)

    diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
    index 4bdaa59..d313ba8 100644
    --- a/arch/x86/pci/fixup.c
    +++ b/arch/x86/pci/fixup.c
    @@ -511,3 +511,30 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1201, fam10h_pci_cfg_space_size);
    DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1202, fam10h_pci_cfg_space_size);
    DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1203, fam10h_pci_cfg_space_size);
    DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1204, fam10h_pci_cfg_space_size);
    +
    +/* SB600: Disable BAR1 on device 14.0 to avoid HPET resources from
    + * confusing the PCI engine */
    +
    +static void sb600_disable_hpet_bar(struct pci_dev *dev)
    +{
    + u8 val;
    +
    + /* The SB600 and SB700 both share the same device
    + * ID, but the PM register 0x55 does something different
    + * for the SB700, so make sure we are dealing with the
    + * SB600 before touching the bit.
    + */
    +
    + pci_read_config_byte(dev, 0x08, &val);
    +
    + if (val < 0x2F) {
    + outb(0x55, 0xCD6);
    + val = inb(0xCD7);
    +
    + /* Set bit 7 in PM register 0x55 */
    + outb(0x55, 0xCD6);
    + outb(val | 0x80, 0xCD7);
    + }
    +}
    +
    +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATI, 0x4385, sb600_disable_hpet_bar);
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