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SubjectRe: [PATCH 0/5] ftrace: to kill a daemon
Steven Rostedt wrote:
> Hmm, good point. Unless...
>
> Can a processor be preempted in a middle of nops? What do nops do for a
> processor? Can it skip them nicely in one shot?
>

The CPU can be interrupted between any two instructions, with a couple
of exceptions (it must, otherwise an unbounded run of nops could cause
an unbounded interrupt latency). If you don't want eip to be in the
middle of your instruction site, you need to make sure it's nopped out
with a single instruction.

Unfortunately, aside from P6_NOP5, none of the standard asm/nops.h nops
are suitable. Something like "0x66, 0x66, 0x66, 0x66, 0x90" would work
everywhere, but its possible putting more than 3 prefixes on the
instruction will kick the decoder into a slow path, which may have a
noticable effect.

> This means I'll have to do the benchmarks again, and see what the
> performance difference of a jmp and a nop is significant. I'm thinking
> that if the processor can safely skip nops without any type of processing,
> this may be the reason that nops are better than a jmp. A jmp causes the
> processor to do a little more work.
>

A no-op jmp could be easily converted to a nop early in the pipeline.
But I don't know whether anyone bothers to do that.

J


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