Messages in this thread | | | Date | Tue, 5 Aug 2008 20:39:44 +0800 | From | Herbert Xu <> | Subject | Re: [PATCH] Using Intel CRC32 instruction to accelerate CRC32c algorithm by new crypto API -V2. |
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Hi Austin:
On Tue, Aug 05, 2008 at 07:56:43AM -0400, Austin Zhang wrote: > Revised by comments: > Move hardware feature detect into module init; > Revise dependency in Kconfig; > Revise variable type; > Add information output while module loading failed; > > > >From NHM processor onward, Intel processors can support hardware > accelerated > CRC32c algorithm with the new CRC32 instruction in SSE 4.2 instruction > set. > The patch detects the availability of the feature, and chooses the most > proper > way to calculate CRC32c checksum. > Byte code instructions are used for compiler compatibility. > No MMX / XMM registers is involved in the implementation. > > Signed-off-by: Austin Zhang <austin.zhang@intel.com> > Signed-off-by: Kent Liu <kent.liu@intel.com>
I tried to apply your patch but it doesn't work:
$ git apply --check --whitespace=error-all ~/p fatal: patch fragment without header at line 34: @@ -0,0 +1,190 @@ $
Looks like your mail client has folded all the lines.
> +u32 crc32c_intel_le_hw_byte(u32 crc, unsigned char const *data, size_t > length)
While you're fixing that up please add a static here.
> +u32 __pure crc32c_intel_le_hw(u32 crc, unsigned char const *p, size_t
And here.
Thanks, -- Visit Openswan at http://www.openswan.org/ Email: Herbert Xu ~{PmV>HI~} <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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