Messages in this thread | | | Date | Fri, 1 Aug 2008 15:49:31 +0200 | From | Haavard Skinnemoen <> | Subject | Re: [PATCH] atmel_spi: fix hang due to missed interrupt |
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Haavard Skinnemoen <haavard.skinnemoen@atmel.com> wrote: > spi_writel(as, RNCR, 0); > spi_writel(as, TNCR, 0); > + ieval = SPI_BIT(RXBUFF) | SPI_BIT(ENDRX) | SPI_BIT(OVRES);
Actually, I think the real bug happens right here: Writing RNCR to 0 will clear any pending ENDRX interrupt, so if the transfer is completed before this, we won't see any interrupt. These writes are also completely pointless -- RNCR is zeroed automatically after it gets shifted into RCR. TNCR works the same way.
The RXBUFF interrupt is only cleared by writing a nonzero RCR or RNCR, so your patch should fix it. But I'm wondering if there may be another race left to fix: If we queue two transfers, and both of them complete before we handle the interrupt, I think we only consider one of them to be complete. If RXBUFF is set, we should complete any "next" transfer we have queued up as well.
It could be your patch fixes this last case too -- when this happens, RXBUFF stays set when we return from the interrupt handler, so the interrupt gets retriggered immediately. We could handle this more efficiently, but I think it's handled correctly with your patch applied.
I'll see if I can find a way to clean up the somewhat headache-inducing control flow in this driver, but until then, your patch should definitely improve things.
As for the overruns, I'm beginning to suspect that the only way to get rid of those and still maintain a reasonable transfer rate is to use bounce buffers in faster RAM (e.g. on-chip SRAM).
Haavard
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