Messages in this thread Patch in this message | | | From | Andi Kleen <> | Subject | [PATCH] [2/10] MCE: Implement the PPro bank 0 quirk in the 64bit machine check code | Date | Tue, 8 Jul 2008 01:10:04 +0200 (CEST) |
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Quoting the comment:
* SDM documents that on family 6 bank 0 should not be written * because it aliases to another special BIOS controlled * register. * But it's not aliased anymore on model 0x1a+ * Don't ignore bank 0 completely because there could be a valid * event later, merely don't write CTL0.
This is mostly a port on the 32bit code, except that 32bit always didn't write it and didn't have the 0x1a heuristic. I checked with the CPU designers that the quirk is not required starting with this model.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
--- arch/x86/kernel/cpu/mcheck/mce_64.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-)
Index: linux/arch/x86/kernel/cpu/mcheck/mce_64.c =================================================================== --- linux.orig/arch/x86/kernel/cpu/mcheck/mce_64.c +++ linux/arch/x86/kernel/cpu/mcheck/mce_64.c @@ -433,6 +433,7 @@ static __init int periodic_mcheck_init(v } __initcall(periodic_mcheck_init); +static int dont_init_bank0; /* * Initialize Machine Checks for a CPU. @@ -462,7 +463,8 @@ static void mce_init(void *dummy) wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff); for (i = 0; i < banks; i++) { - wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]); + if (!(i == 0 && dont_init_bank0)) + wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]); wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0); } } @@ -481,6 +483,18 @@ static void __cpuinit mce_cpu_quirks(str by default and leave crap in there. Don't log. */ mce_bootlog = 0; } + if (c->x86_vendor == X86_VENDOR_INTEL) { + /* + * SDM documents that on family 6 bank 0 should not be written + * because it aliases to another special BIOS controlled + * register. + * But it's not aliased anymore on model 0x1a+ + * Don't ignore bank 0 completely because there could be a valid + * event later, merely don't write CTL0. + */ + if (c->x86 == 6 && c->x86_model < 0x1A) + dont_init_bank0 = 1; + } }
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