Messages in this thread | | | Date | Tue, 3 Jun 2008 12:40:04 +0200 (CEST) | From | Thomas Gleixner <> | Subject | Re: [PATCH 3/7] disable legacy boot interrupt generation |
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On Mon, 2 Jun 2008, Olaf Dabrunz wrote: > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index 6173be5..8f09f8f 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -1377,6 +1377,34 @@ int nobootirqquirk_setup(char *str) > __setup("nobootirqquirk", nobootirqquirk_setup); > > /* > + * On some chipsets we can disable the generation of legacy INTx boot > + * interrupts. > + */ > +#define PCI_IOAPIC_ALTERNATE_BASE_ADDRESS 0x40 > +#define INTEL_6300_ESB_BOOT_INTERRUPT_ENABLE (1<<14)
new line
> +static void quirk_disable_intel_boot_interrupt(struct pci_dev *dev) > +{ > + u16 cnf; > + > + if (nobootirqquirk) > + return; > + > + pci_read_config_word(dev, PCI_IOAPIC_ALTERNATE_BASE_ADDRESS, &cnf); > + /* this disables the boot interrupt even though it reads ENABLE */
And why cant we use a name for that constant which makes this obvious w/o a comment ?
> + cnf |= INTEL_6300_ESB_BOOT_INTERRUPT_ENABLE; > + pci_write_config_word(dev, PCI_IOAPIC_ALTERNATE_BASE_ADDRESS, cnf); > + > + printk(KERN_INFO "disabled boot interrupt on device 0x%04x:0x%04x\n", > + dev->vendor, dev->device); > +} > +#undef PCI_IOAPIC_ALTERNATE_BASE_ADDRESS
Why #undef ?
> +/* > + * IO-APIC1 on 6300ESB generates boot interrupts, see intel order no > + * 300641-004US, section 5.7.3. > + */ > +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_10, quirk_disable_intel_boot_interrupt); > + > +/* > * Boot interrupts on some chipsets cannot be turned off. For these chipsets, > * remap the original interrupt in the linux kernel to the boot interrupt, so > * that a PCI device's interrupt handler is installed on the boot interrupt > diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h > index c675399..b89616d 100644 > --- a/include/linux/pci_ids.h > +++ b/include/linux/pci_ids.h > @@ -2309,6 +2309,7 @@ > #define PCI_DEVICE_ID_INTEL_ESB_4 0x25a4 > #define PCI_DEVICE_ID_INTEL_ESB_5 0x25a6 > #define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab > +#define PCI_DEVICE_ID_INTEL_ESB_10 0x25ac > #define PCI_DEVICE_ID_INTEL_82820_HB 0x2500 > #define PCI_DEVICE_ID_INTEL_82820_UP_HB 0x2501 > #define PCI_DEVICE_ID_INTEL_82850_HB 0x2530 > -- > 1.5.2.4 > > -- > Olaf Dabrunz (od/odabrunz), SUSE Linux Products GmbH, N??rnberg >
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