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SubjectRe: [PATCH 1/2] x86: mtrr cleanup for converting continuous to discrete layout v7
On Tue, Apr 29, 2008 at 1:25 PM, Gabriel C <nix.or.die@googlemail.com> wrote:
>
> Yinghai Lu wrote:
> > On Tue, Apr 29, 2008 at 4:51 AM, Gabriel C <nix.or.die@googlemail.com> wrote:
> >> Yinghai Lu wrote:
> >> > On Tue, Apr 29, 2008 at 3:30 AM, Yinghai Lu <yhlu.kernel@gmail.com> wrote:
> >> >> On Tue, Apr 29, 2008 at 2:47 AM, Gabriel C <nix.or.die@googlemail.com> wrote:
> >> >> > Yinghai Lu wrote:
> >> >> > > some BIOS like to use continus MTRR layout, and may X driver can not add
> >> >> > > WB entries for graphical cards when 4g or more RAM installed.
> >> >> > >
> >> >> > > the patch will change MTRR to discrete.
> >> >> > >
> >> >> > > mtrr_chunk_size= could be used to have smaller continuous block to hold holes.
> >> >> > > default is 256m, could be set according to size of graphics card memory.
> >> >> > >
> >> >> > > v2: fix -1 for UC checking
> >> >> > > v3: default to disable, and need use enable_mtrr_cleanup to enable this feature
> >> >> > > skip the var state change warning.
> >> >> > > remove next_basek in range_to_mtrr()
> >> >> > > v4: correct warning mask.
> >> >> > > v5: CONFIG_MTRR_SANITIZER
> >> >> > > v6: fix 1g, 2g, 512 aligment with extra hole
> >> >> > > v7: gran_sizek to prevent running out of MTRRs.
> >> >> > >
> >> >> >
> >> >> > With this version ( and patch http://lkml.org/lkml/2008/4/29/97 ) applyed on latest linus git tree
> >> >> > the box OOPS'es early.
> >> >> >
> >> >> > Sorry I don't have time right now to write down the part of the OOPS I can see on monitor , I can try to find
> >> >> > some time later.
> >> >> >
> >> >> > In any way OOPS'es on __free_one_page+0x191/0x21e
> >> >>
> >> >> thanks. found one problem with hole_basek ...
> >> >>
> >> >> will send you v8, and hope it will be last version.
> >> >
> >> > please try v8, it should get rid of the 8m entry. it need patch
> >> > http://lkml.org/lkml/2008/4/29/97 too.
> >>
> >> Box does boot with v8 but now I get that warning you fixed in v2 again =):
> >>
> >> ....
> >> [ 0.000000] Linux version 2.6.25-06058-ga01e035-dirty (crazy@thor) (gcc version 4.3.0 (Frugalware Linux) ) #805 SMP PREEMPT Tue Apr 29 13:04:49 CEST 2008
> >> [ 0.000000] Command line: root=/dev/sdb1 ro debug vga=0x317
> >> [ 0.000000] BIOS-provided physical RAM map:
> >> [ 0.000000] BIOS-e820: 0000000000000000 - 000000000009cc00 (usable)
> >> [ 0.000000] BIOS-e820: 000000000009cc00 - 00000000000a0000 (reserved)
> >> [ 0.000000] BIOS-e820: 00000000000e4000 - 0000000000100000 (reserved)
> >> [ 0.000000] BIOS-e820: 0000000000100000 - 00000000cf550000 (usable)
> >> [ 0.000000] BIOS-e820: 00000000cf550000 - 00000000cf55e000 (ACPI data)
> >> [ 0.000000] BIOS-e820: 00000000cf55e000 - 00000000cf5e0000 (ACPI NVS)
> >> [ 0.000000] BIOS-e820: 00000000cf5e0000 - 00000000cf600000 (reserved)
> >> [ 0.000000] BIOS-e820: 00000000fee00000 - 00000000fee01000 (reserved)
> >> [ 0.000000] BIOS-e820: 00000000ffc00000 - 0000000100000000 (reserved)
> >> [ 0.000000] BIOS-e820: 0000000100000000 - 000000012c000000 (usable)
> >> [ 0.000000] Entering add_active_range(0, 0, 156) 0 entries of 256 used
> >> [ 0.000000] Entering add_active_range(0, 256, 849232) 1 entries of 256 used
> >> [ 0.000000] Entering add_active_range(0, 1048576, 1228800) 2 entries of 256 used
> >> [ 0.000000] max_pfn_mapped = 1228800
> >> [ 0.000000] x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
> >> [ 0.000000] After WB checking
> >> [ 0.000000] MTRR MAP PFN: 0000000000000000 - 000000000012c000
> >> [ 0.000000] After UC checking
> >> [ 0.000000] MTRR MAP PFN: 0000000000000000 - 00000000000cf600
> >> [ 0.000000] MTRR MAP PFN: 0000000000100000 - 000000000012c000
> >> [ 0.000000] MTRR MAP PFN: 00000000000cf800 - 00000000000d0000
> >> [ 0.000000] After sorting
> >> [ 0.000000] MTRR MAP PFN: 0000000000000000 - 00000000000cf600
> >> [ 0.000000] MTRR MAP PFN: 00000000000cf800 - 00000000000d0000
> >> [ 0.000000] MTRR MAP PFN: 0000000000100000 - 000000000012c000
> >> [ 0.000000] range0: 0000000000000000 - 00000000c0000000
> >> [ 0.000000] Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
> >> [ 0.000000] Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
> >> [ 0.000000] range: 00000000c0000000 - 00000000d0000000
> >> [ 0.000000] Setting variable MTRR 2, base: 3072MB, range: 256MB, type WB
> >> [ 0.000000] hole: 00000000cc000000 - 00000000d0000000
> >> [ 0.000000] Setting variable MTRR 3, base: 3264MB, range: 64MB, type UC
> >> [ 0.000000] rangeX: 00000000d0000000 - 00000000d0000000
> >> [ 0.000000] range0: 0000000100000000 - 0000000120000000
> >> [ 0.000000] Setting variable MTRR 4, base: 4096MB, range: 512MB, type WB
> >> [ 0.000000] range: 0000000120000000 - 0000000130000000
> >> [ 0.000000] Setting variable MTRR 5, base: 4608MB, range: 256MB, type WB
> >> [ 0.000000] hole: 000000012c000000 - 0000000130000000
> >> [ 0.000000] Setting variable MTRR 6, base: 4800MB, range: 64MB, type UC
> >> [ 0.000000] DONE variable MTRRs
> >> [ 0.000000] x86 PAT enabled: cpu 0, old 0x7010600070106, new 0x7010600070106
> >> [ 0.000000] After WB checking
> >> [ 0.000000] MTRR MAP PFN: 0000000000000000 - 00000000000d0000
> >> [ 0.000000] MTRR MAP PFN: 0000000000100000 - 0000000000130000
> >> [ 0.000000] After UC checking
> >> [ 0.000000] MTRR MAP PFN: 0000000000000000 - 00000000000cc000
> >> [ 0.000000] MTRR MAP PFN: 0000000000100000 - 000000000012c000
> >> [ 0.000000] After sorting
> >> [ 0.000000] MTRR MAP PFN: 0000000000000000 - 00000000000cc000
> >> [ 0.000000] MTRR MAP PFN: 0000000000100000 - 000000000012c000
> >> [ 0.000000] WARNING: BIOS bug: CPU MTRRs don't cover all of memory, losing 757MB of RAM.
> >
> > so
> >> [ 0.000000] MTRR MAP PFN: 0000000000000000 - 00000000000cf600
> >> [ 0.000000] MTRR MAP PFN: 00000000000cf800 - 00000000000d0000
> >> [ 0.000000] MTRR MAP PFN: 0000000000100000 - 000000000012c000
> > ===>
> >> [ 0.000000] MTRR MAP PFN: 0000000000000000 - 00000000000cc000
> >> [ 0.000000] MTRR MAP PFN: 0000000000100000 - 000000000012c000
> >
> > please try
>
> Now I have 2 warnings
>
>
> > mtrr_chunk_size=512m mtrr_gran_size=128m
>
> ...
>
> [ 0.000000] Command line: root=/dev/sdb1 ro debug vga=0x317 mtrr_chunk_size=512m mtrr_gran_size=128m 3
>
>
> [ 0.000000] BIOS-provided physical RAM map:
> [ 0.000000] BIOS-e820: 0000000000000000 - 000000000009cc00 (usable)
> [ 0.000000] BIOS-e820: 000000000009cc00 - 00000000000a0000 (reserved)
> [ 0.000000] BIOS-e820: 00000000000e4000 - 0000000000100000 (reserved)
> [ 0.000000] BIOS-e820: 0000000000100000 - 00000000cf550000 (usable)
> [ 0.000000] BIOS-e820: 00000000cf550000 - 00000000cf55e000 (ACPI data)
> [ 0.000000] BIOS-e820: 00000000cf55e000 - 00000000cf5e0000 (ACPI NVS)
> [ 0.000000] BIOS-e820: 00000000cf5e0000 - 00000000cf600000 (reserved)
> [ 0.000000] BIOS-e820: 00000000fee00000 - 00000000fee01000 (reserved)
> [ 0.000000] BIOS-e820: 00000000ffc00000 - 0000000100000000 (reserved)
> [ 0.000000] BIOS-e820: 0000000100000000 - 000000012c000000 (usable)
> [ 0.000000] Entering add_active_range(0, 0, 156) 0 entries of 256 used
> [ 0.000000] Entering add_active_range(0, 256, 849232) 1 entries of 256 used
> [ 0.000000] Entering add_active_range(0, 1048576, 1228800) 2 entries of 256 used
> [ 0.000000] max_pfn_mapped = 1228800
> [ 0.000000] x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
> [ 0.000000] After WB checking
> [ 0.000000] MTRR MAP PFN: 0000000000000000 - 000000000012c000
> [ 0.000000] After UC checking
> [ 0.000000] MTRR MAP PFN: 0000000000000000 - 00000000000cf600
> [ 0.000000] MTRR MAP PFN: 0000000000100000 - 000000000012c000
> [ 0.000000] MTRR MAP PFN: 00000000000cf800 - 00000000000d0000
> [ 0.000000] After sorting
> [ 0.000000] MTRR MAP PFN: 0000000000000000 - 00000000000cf600
> [ 0.000000] MTRR MAP PFN: 00000000000cf800 - 00000000000d0000
> [ 0.000000] MTRR MAP PFN: 0000000000100000 - 000000000012c000
> [ 0.000000] range0: 0000000000000000 - 00000000c0000000
> [ 0.000000] Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
> [ 0.000000] Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
> [ 0.000000] range: 00000000c0000000 - 00000000c8000000
> [ 0.000000] Setting variable MTRR 2, base: 3072MB, range: 128MB, type WB
>
> [ 0.000000] rangeX: 00000000d0000000 - 00000000d0000000
> [ 0.000000] range0: 0000000100000000 - 0000000120000000
> [ 0.000000] Setting variable MTRR 3, base: 4096MB, range: 512MB, type WB
> [ 0.000000] range: 0000000120000000 - 0000000128000000
> [ 0.000000] Setting variable MTRR 4, base: 4608MB, range: 128MB, type WB
>
> [ 0.000000] DONE variable MTRRs
> [ 0.000000] x86 PAT enabled: cpu 0, old 0x7010600070106, new 0x7010600070106
> [ 0.000000] After WB checking
> [ 0.000000] MTRR MAP PFN: 0000000000000000 - 00000000000c8000
> [ 0.000000] MTRR MAP PFN: 0000000000100000 - 0000000000128000
>
> [ 0.000000] After UC checking
> [ 0.000000] MTRR MAP PFN: 0000000000000000 - 00000000000c8000
> [ 0.000000] MTRR MAP PFN: 0000000000100000 - 0000000000128000
> [ 0.000000] After sorting
> [ 0.000000] MTRR MAP PFN: 0000000000000000 - 00000000000c8000
> [ 0.000000] MTRR MAP PFN: 0000000000100000 - 0000000000128000
> [ 0.000000] WARNING: BIOS bug: CPU MTRRs don't cover all of memory, losing 64MB of RAM.
> [ 0.000000] ------------[ cut here ]------------
> [ 0.000000] WARNING: at arch/x86/kernel/cpu/mtrr/main.c:1206 mtrr_trim_uncached_memory+0x25b/0x35a()
>
> [ 0.000000] Modules linked in:
> [ 0.000000] Pid: 0, comm: swapper Not tainted 2.6.25-06058-ga01e035-dirty #805
> [ 0.000000]
> [ 0.000000] Call Trace:
> [ 0.000000] [<ffffffff8022d661>] warn_on_slowpath+0x51/0x78
> [ 0.000000] [<ffffffff8067f0dc>] x86_get_mtrr_mem_range+0x241/0x25c
> [ 0.000000] [<ffffffff8067d93e>] update_memory_range+0x95/0xb7
> [ 0.000000] [<ffffffff8067fa51>] mtrr_trim_uncached_memory+0x25b/0x35a
>
> [ 0.000000] [<ffffffff8067ca43>] setup_arch+0x280/0x4a2
> [ 0.000000] [<ffffffff80676aa6>] start_kernel+0x6e/0x308
> [ 0.000000] [<ffffffff80676432>] x86_64_start_kernel+0x241/0x24a
> [ 0.000000]
> [ 0.000000] ---[ end trace ca143223eefdc828 ]---
> [ 0.000000] update e820 for mtrr -- end_pfn
> [ 0.000000] modified physical RAM map:
> [ 0.000000] modified: 0000000000000000 - 000000000009cc00 (usable)
> [ 0.000000] modified: 000000000009cc00 - 00000000000a0000 (reserved)
> [ 0.000000] modified: 00000000000e4000 - 0000000000100000 (reserved)
> [ 0.000000] modified: 0000000000100000 - 00000000cf550000 (usable)
> [ 0.000000] modified: 00000000cf550000 - 00000000cf55e000 (ACPI data)
> [ 0.000000] modified: 00000000cf55e000 - 00000000cf5e0000 (ACPI NVS)
> [ 0.000000] modified: 00000000cf5e0000 - 00000000cf600000 (reserved)
> [ 0.000000] modified: 00000000fee00000 - 00000000fee01000 (reserved)
> [ 0.000000] modified: 00000000ffc00000 - 0000000100000000 (reserved)
> [ 0.000000] modified: 0000000100000000 - 0000000128000000 (usable)
> [ 0.000000] modified: 0000000128000000 - 000000012c000000 (reserved)
>
> [ 0.000000] WARNING: BIOS bug: CPU MTRRs don't cover all of memory, losing 757MB of RAM.
>
> [ 0.000000] ------------[ cut here ]------------
> [ 0.000000] WARNING: at arch/x86/kernel/cpu/mtrr/main.c:1227 mtrr_trim_uncached_memory+0x30c/0x35a()
> [ 0.000000] Modules linked in:
> [ 0.000000] Pid: 0, comm: swapper Not tainted 2.6.25-06058-ga01e035-dirty #805
> [ 0.000000]
> [ 0.000000] Call Trace:
> [ 0.000000] [<ffffffff8022d661>] warn_on_slowpath+0x51/0x78
> [ 0.000000] [<ffffffff8067f0dc>] x86_get_mtrr_mem_range+0x241/0x25c
> [ 0.000000] [<ffffffff8067d93e>] update_memory_range+0x95/0xb7
> [ 0.000000] [<ffffffff8067fb02>] mtrr_trim_uncached_memory+0x30c/0x35a
> [ 0.000000] [<ffffffff8067ca43>] setup_arch+0x280/0x4a2
> [ 0.000000] [<ffffffff80676aa6>] start_kernel+0x6e/0x308
> [ 0.000000] [<ffffffff80676432>] x86_64_start_kernel+0x241/0x24a
> [ 0.000000]
> [ 0.000000] ---[ end trace ca143223eefdc828 ]---
> [ 0.000000] update e820 for mtrr -- holes
> [ 0.000000] modified physical RAM map:
> [ 0.000000] modified: 0000000000000000 - 000000000009cc00 (usable)
> [ 0.000000] modified: 000000000009cc00 - 00000000000a0000 (reserved)
> [ 0.000000] modified: 00000000000e4000 - 0000000000100000 (reserved)
> [ 0.000000] modified: 0000000000100000 - 00000000c8000000 (usable)
> [ 0.000000] modified: 00000000c8000000 - 00000000cf550000 (reserved)
> [ 0.000000] modified: 00000000cf550000 - 00000000cf55e000 (ACPI data)
> [ 0.000000] modified: 00000000cf55e000 - 00000000cf5e0000 (ACPI NVS)
> [ 0.000000] modified: 00000000cf5e0000 - 00000000cf600000 (reserved)
> [ 0.000000] modified: 00000000fee00000 - 00000000fee01000 (reserved)
> [ 0.000000] modified: 00000000ffc00000 - 000000012c000000 (reserved)
>
> [ 0.000000] Entering add_active_range(0, 0, 156) 3 entries of 256 used
> [ 0.000000] Entering add_active_range(0, 256, 819200) 3 entries of 256 used

please try attached trim_holes_fix.patch..., it will fix the trim hole problem.

then check if X server works well.

then try mtrr_cleanup_fix.patch for... ==> address ingo request about style etc.

Thanks

Yinghai Lu
Index: linux-2.6/arch/x86/kernel/cpu/mtrr/main.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/cpu/mtrr/main.c
+++ linux-2.6/arch/x86/kernel/cpu/mtrr/main.c
@@ -1214,7 +1230,7 @@ int __init mtrr_trim_uncached_memory(uns
if (range[0].start)
total_real_trim_size += real_trim_memory(0, range[0].start);

- for (i = 0; i < nr_range - 1; i--) {
+ for (i = 0; i < nr_range - 1; i++) {
if (range[i].end + 1 < range[i+1].start)
total_real_trim_size += real_trim_memory(range[i].end + 1, range[i+1].start);
}Index: linux-2.6/arch/x86/Kconfig
===================================================================
--- linux-2.6.orig/arch/x86/Kconfig
+++ linux-2.6/arch/x86/Kconfig
@@ -1092,13 +1092,12 @@ config MTRR_SANITIZER
If unsure, say Y.

config MTRR_SANITIZER_ENABLE_DEFAULT
- def_bool y
- prompt "Enable MTRR cleanup by default"
+ int "MTRR cleanup enable value (0-1)"
+ range 0 1
+ default "1"
depends on MTRR_SANITIZER
help
- Enable mtrr cleanup by default
-
- If unsure, say Y.
+ Enable mtrr cleanup default value

config X86_PAT
bool
Index: linux-2.6/arch/x86/kernel/cpu/mtrr/main.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/cpu/mtrr/main.c
+++ linux-2.6/arch/x86/kernel/cpu/mtrr/main.c
@@ -611,17 +611,9 @@ static struct sysdev_driver mtrr_sysdev_
};

#ifdef CONFIG_MTRR_SANITIZER
-
-#ifdef CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT
-static int enable_mtrr_cleanup __initdata = 1;
-#else
-static int enable_mtrr_cleanup __initdata;
-#endif
-
+static int enable_mtrr_cleanup __initdata = CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT;
#else
-
static int enable_mtrr_cleanup __initdata = -1;
-
#endif

static int __init disable_mtrr_cleanup_setup(char *str)
@@ -640,6 +632,7 @@ static int __init enable_mtrr_cleanup_se
}
early_param("enble_mtrr_cleanup", enable_mtrr_cleanup_setup);

+/* should be related to MTRR_VAR_RANGES nums */
#define RANGE_NUM 256

struct res_range {
@@ -647,13 +640,27 @@ struct res_range {
unsigned long end;
};

-static int __init add_range(struct res_range *range, int nr_range, unsigned long start,
- unsigned long end, int merge)
+static int __init
+add_range(struct res_range *range, int nr_range, unsigned long start,
+ unsigned long end)
{
- int i;
+ /* out of slots */
+ if (nr_range >= RANGE_NUM)
+ return nr_range;

- if (!merge)
- goto addit;
+ range[nr_range].start = start;
+ range[nr_range].end = end;
+
+ nr_range++;
+
+ return nr_range;
+}
+
+static int __init
+add_range_with_merge(struct res_range *range, int nr_range, unsigned long start,
+ unsigned long end)
+{
+ int i;

/* try to merge it with old one */
for (i = 0; i < nr_range; i++) {
@@ -676,24 +683,14 @@ static int __init add_range(struct res_r
return nr_range;
}

-addit:
/* need to add that */
- if (nr_range >= RANGE_NUM)
- return nr_range;
-
- range[nr_range].start = start;
- range[nr_range].end = end;
-
- nr_range++;
-
- return nr_range;
-
+ return add_range(range, nr_range, start, end);
}
-static void __init subtract_range(struct res_range *range, unsigned long start,
- unsigned long end)
+
+static void __init
+subtract_range(struct res_range *range, unsigned long start, unsigned long end)
{
- int i;
- int j;
+ int i, j;

for (j = 0; j < RANGE_NUM; j++) {
if (!range[j].end)
@@ -747,46 +744,47 @@ static int __init cmp_range(const void *
}

struct var_mtrr_state {
- unsigned long range_startk, range_sizek;
- unsigned long chunk_sizek;
- unsigned long gran_sizek;
- unsigned int reg;
- unsigned address_bits;
+ unsigned long range_startk;
+ unsigned long range_sizek;
+ unsigned long chunk_sizek;
+ unsigned long gran_sizek;
+ unsigned int reg;
+ unsigned int address_bits;
};

-static void __init set_var_mtrr(
- unsigned int reg, unsigned long basek, unsigned long sizek,
- unsigned char type, unsigned address_bits)
+static void __init
+set_var_mtrr(unsigned int reg, unsigned long basek, unsigned long sizek,
+ unsigned char type, unsigned address_bits)
{
u32 base_lo, base_hi, mask_lo, mask_hi;
- unsigned address_mask_high;
+ u64 base, mask;

if (!sizek) {
fill_mtrr_var_range(reg, 0, 0, 0, 0);
return;
}

- address_mask_high = ((1u << (address_bits - 32u)) - 1u);
+ mask = (1ULL << address_bits) - 1;
+ mask &= ~((((u64)sizek) << 10) - 1);

- base_hi = basek >> 22;
- base_lo = basek << 10;
+ base = ((u64)basek) << 10;

- if (sizek < 4*1024*1024) {
- mask_hi = address_mask_high;
- mask_lo = ~((sizek << 10) - 1);
- } else {
- mask_hi = address_mask_high & (~((sizek >> 22) - 1));
- mask_lo = 0;
- }
+ base |= type;
+ mask |= 0x800;
+
+ base_lo = base & ((1ULL<<32) - 1);
+ base_hi = base >> 32;
+
+ mask_lo = mask & ((1ULL<<32) - 1);
+ mask_hi = mask >> 32;

- base_lo |= type;
- mask_lo |= 0x800;
fill_mtrr_var_range(reg, base_lo, base_hi, mask_lo, mask_hi);
}

-static unsigned int __init range_to_mtrr(unsigned int reg,
- unsigned long range_startk, unsigned long range_sizek,
- unsigned char type, unsigned address_bits)
+static unsigned int __init
+range_to_mtrr(unsigned int reg, unsigned long range_startk,
+ unsigned long range_sizek, unsigned char type,
+ unsigned address_bits)
{
if (!range_sizek || (reg >= num_var_ranges))
return reg;
@@ -794,6 +792,7 @@ static unsigned int __init range_to_mtrr
while (range_sizek) {
unsigned long max_align, align;
unsigned long sizek;
+
/* Compute the maximum size I can make a range */
if (range_startk)
max_align = ffs(range_startk) - 1;
@@ -818,7 +817,8 @@ static unsigned int __init range_to_mtrr
return reg;
}

-static void __init range_to_mtrr_with_hole(struct var_mtrr_state *state, unsigned long basek)
+static void __init
+range_to_mtrr_with_hole(struct var_mtrr_state *state, unsigned long basek)
{
unsigned long hole_basek, hole_sizek;
unsigned long range0_basek, range0_sizek;
@@ -848,23 +848,31 @@ static void __init range_to_mtrr_with_ho
/* try to append some small hole */
range0_basek = state->range_startk;
range0_sizek = ALIGN(state->range_sizek, chunk_sizek);
- if ((range0_sizek == state->range_sizek) ||
- ((range0_basek + range0_sizek - chunk_sizek > basek) && basek)) {
+ if (range0_sizek == state->range_sizek) {
printk(KERN_INFO "rangeX: %016lx - %016lx\n", range0_basek<<10, (range0_basek + state->range_sizek)<<10);
state->reg = range_to_mtrr(state->reg, range0_basek,
state->range_sizek, MTRR_TYPE_WRBACK, state->address_bits);
return;
+ } else if (basek) {
+ while (range0_basek + range0_sizek - chunk_sizek > basek) {
+ range0_sizek -= chunk_sizek;
+ if (!range0_sizek)
+ break;
+ }
}


- range0_sizek -= chunk_sizek;
+ if (range0_sizek > chunk_sizek)
+ range0_sizek -= chunk_sizek;
printk(KERN_INFO "range0: %016lx - %016lx\n", range0_basek<<10, (range0_basek + range0_sizek)<<10);
state->reg = range_to_mtrr(state->reg, range0_basek,
range0_sizek, MTRR_TYPE_WRBACK, state->address_bits);

range_basek = range0_basek + range0_sizek;
range_sizek = chunk_sizek;
- if (range_sizek - (state->range_sizek - range0_sizek) < (chunk_sizek >> 1)) {
+
+ if ((range_sizek - (state->range_sizek - range0_sizek) < (chunk_sizek >> 1)) &&
+ (range_basek + range_sizek <= basek)) {
hole_sizek = range_sizek - (state->range_sizek - range0_sizek);
hole_basek = range_basek + range_sizek - hole_sizek;
} else
@@ -880,7 +888,9 @@ static void __init range_to_mtrr_with_ho
}
}

-static void __init set_var_mtrr_range(struct var_mtrr_state *state, unsigned long base_pfn, unsigned long size_pfn)
+static void __init
+set_var_mtrr_range(struct var_mtrr_state *state, unsigned long base_pfn,
+ unsigned long size_pfn)
{
unsigned long basek, sizek;

@@ -921,7 +931,7 @@ static int __init parse_mtrr_chunk_size_
early_param("mtrr_chunk_size", parse_mtrr_chunk_size_opt);

/* granity of mtrr of block */
-static u64 mtrr_gran_size __initdata = (64ULL<<20);
+static u64 mtrr_gran_size __initdata = (1ULL<<20);

static int __init parse_mtrr_gran_size_opt(char *p)
{
@@ -932,17 +942,19 @@ static int __init parse_mtrr_gran_size_o
}
early_param("mtrr_gran_size", parse_mtrr_gran_size_opt);

-static void __init x86_setup_var_mtrrs(struct res_range *range, int nr_range, unsigned address_bits)
+static void __init
+x86_setup_var_mtrrs(struct res_range *range, int nr_range,
+ unsigned address_bits)
{
struct var_mtrr_state var_state;
int i;

- var_state.range_startk = 0;
- var_state.range_sizek = 0;
- var_state.reg = 0;
- var_state.address_bits = address_bits;
- var_state.chunk_sizek = mtrr_chunk_size >> 10;
- var_state.gran_sizek = mtrr_gran_size >> 10;
+ var_state.range_startk = 0;
+ var_state.range_sizek = 0;
+ var_state.reg = 0;
+ var_state.address_bits = address_bits;
+ var_state.chunk_sizek = mtrr_chunk_size >> 10;
+ var_state.gran_sizek = mtrr_gran_size >> 10;

/* Write the range etc */
for (i = 0; i < nr_range; i++)
@@ -952,11 +964,16 @@ static void __init x86_setup_var_mtrrs(s
range_to_mtrr_with_hole(&var_state, 0);
printk(KERN_INFO "DONE variable MTRRs\n");
/* Clear out the extra MTRR's */
- while (var_state.reg < num_var_ranges)
- set_var_mtrr(var_state.reg++, 0, 0, 0, var_state.address_bits);
+ while (var_state.reg < num_var_ranges) {
+ set_var_mtrr(var_state.reg, 0, 0, 0, var_state.address_bits);
+ var_state.reg++;
+ }
}

-static int __init x86_get_mtrr_mem_range(struct res_range *range, int nr_range, unsigned long extra_remove_base, unsigned long extra_remove_size)
+static int __init
+x86_get_mtrr_mem_range(struct res_range *range, int nr_range,
+ unsigned long extra_remove_base,
+ unsigned long extra_remove_size)
{
unsigned long i, base, size;
mtrr_type type;
@@ -965,7 +982,7 @@ static int __init x86_get_mtrr_mem_range
mtrr_if->get(i, &base, &size, &type);
if (type != MTRR_TYPE_WRBACK)
continue;
- nr_range = add_range(range, nr_range, base, base + size - 1, 1);
+ nr_range = add_range_with_merge(range, nr_range, base, base + size - 1);
}
printk(KERN_INFO "After WB checking\n");
for (i = 0; i < nr_range; i++)
@@ -1005,11 +1022,11 @@ static int __init x86_get_mtrr_mem_range

static int __init mtrr_cleanup(unsigned address_bits)
{
+ unsigned long extra_remove_base, extra_remove_size;
unsigned long i, base, size, def, dummy;
- mtrr_type type;
struct res_range range[RANGE_NUM];
+ mtrr_type type;
int nr_range;
- unsigned long extra_remove_base, extra_remove_size;

/* extra one for all 0 */
int num[MTRR_NUM_TYPES + 1];
@@ -1053,7 +1070,6 @@ static int __init mtrr_cleanup(unsigned
x86_setup_var_mtrrs(range, nr_range, address_bits);

return 1;
-
}

static int disable_mtrr_trim;
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  Last update: 2008-04-29 23:51    [from the cache]
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