Messages in this thread Patch in this message | | | Subject | Re: [patch] x86, voyager: fix ioremap_nocache() | From | James Bottomley <> | Date | Sun, 27 Apr 2008 18:34:20 -0400 |
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Here's another piece of the x86 API that's designed to be cached. The dma_declare_coherent_memory() usually represents behind bridge memory that's fully participatory in the coherence model.
Making it uncached damages the utility of this memory because doing cacheline sized burst cycles when needed to it is far faster than individual byte/word/quad writes.
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
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diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c index 388b113..df83ffd 100644 --- a/arch/x86/kernel/pci-dma.c +++ b/arch/x86/kernel/pci-dma.c @@ -214,7 +214,7 @@ int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, /* FIXME: this routine just ignores DMA_MEMORY_INCLUDES_CHILDREN */ - mem_base = ioremap(bus_addr, size); + mem_base = ioremap_cache(bus_addr, size); if (!mem_base) goto out;
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