Messages in this thread | | | Date | Mon, 21 Apr 2008 11:11:11 -0400 | From | Mathieu Desnoyers <> | Subject | Re: [RFC PATCH] x86 NMI-safe INT3 and Page Fault (v5) |
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* Mathieu Desnoyers (compudj@krystal.dyndns.org) wrote: > * H. Peter Anvin (hpa@zytor.com) wrote: > > Pavel Machek wrote: > >> On Thu 2008-04-17 16:14:10, Mathieu Desnoyers wrote: > >>> (hopefully finally CCing LKML) :) > >>> > >>> Implements an alternative iret with popf and return so trap and exception > >>> handlers can return to the NMI handler without issuing iret. iret would > >>> cause > >>> NMIs to be reenabled prematurely. x86_32 uses popf and far return. x86_64 > >>> has to > >>> copy the return instruction pointer to the top of the previous stack, > >>> issue a > >>> popf, loads the previous esp and issue a near return (ret). > >> sounds expensive. Does it slow down normal loads? > > > > It should *only* be used to return from NMI, #MC or INT3 (breakpoint), > > which should never happen in normal operation, and even then only when > > interrupting another NMI or #MC handler. > > > > -hpa > > > > Just to be clear : the added cost on normal interrupt return is to add a > supplementary test of the thread flags already loaded in registers and
err, by thread flag, I meant thread preempt count. And it's not in registers, so it has to be read from the data cache (it's clearly already there).
> a conditional branch. This is used to detect if we are nested over an > NMI handler. I doubt anyone ever notice an impact caused by this added > test/branch. > > Mathieu > > -- > Mathieu Desnoyers > Computer Engineering Ph.D. Student, Ecole Polytechnique de Montreal > OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68
-- Mathieu Desnoyers Computer Engineering Ph.D. Student, Ecole Polytechnique de Montreal OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68
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