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Subject[patch 2.6.25-rc5] kerneldoc for <linux/clk.h>
Add <linux/clk.h> to the generated kerneldoc, with some overview
to go along with those per-function descriptions.

Signed-off-by: David Brownell <>
Documentation/DocBook/kernel-api.tmpl | 55 ++++++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)

--- g26.orig/Documentation/DocBook/kernel-api.tmpl 2008-03-10 16:44:57.000000000 -0700
+++ g26/Documentation/DocBook/kernel-api.tmpl 2008-03-10 18:52:11.000000000 -0700
@@ -650,4 +650,59 @@ X!Idrivers/video/console/fonts.c

+ <chapter id="clk">
+ <title>Clock Framework</title>
+ <para>
+ The clock framework defines programming interfaces to support
+ software management of the system clock tree.
+ This framework is widely used with System-On-Chip (SOC) platforms
+ to support power management and various devices which may need
+ custom clock rates.
+ Note that these "clocks" don't relate to timekeeping or real
+ time clocks (RTCs), each of which have separate frameworks.
+ These <structname>struct clk</structname> instances may be used
+ to manage for example a 96 MHz signal that is used to shift bits
+ into and out of peripherals or busses, or otherwise trigger
+ synchronous state machine transitions in system hardware.
+ </para>
+ <para>
+ Power management is supported by explicit software clock gating:
+ unused clocks are disabled, so the system doesn't waste power
+ changing the state of transistors that aren't in active use.
+ On some systems this may be backed by hardware clock gating.
+ Circuits will still have leakage current to be managed, which
+ costs more with finer cicuit geometries, but for CMOS circuits
+ power is mostly spent by clocked state changes.
+ Sections of chips that are powered but not clocked may be able
+ to retain their last state.
+ This low power state is often called a <emphasis>retention
+ mode</emphasis>, in contrast to <emphasis>off</emphasis> where
+ power is cut and no state is retained but where leakage currents
+ may have a significant impact on battery life.
+ </para>
+ <para>
+ Power-aware drivers only enable their clocks when the device
+ they manage is in active use. Also, system sleep states often
+ differ according to which clock domains are active: while a
+ "standby" state may allow wakeup from several active domains, a
+ "mem" (suspend-to-RAM) state may require a more wholesale shutdown
+ of clocks derived from higher speed PLLs and oscillators, limiting
+ the number of possible wakeup event sources. A driver's suspend
+ method may need to be aware of system-specific clock constraints
+ on the target sleep state.
+ </para>
+ <para>
+ Some platforms support programmable clock generators. These
+ can be used by external chips of various kinds, such as other
+ CPUs, multimedia codecs, and devices with strict requirements
+ for interface clocking.
+ </para>
+ </chapter>

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