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SubjectRe: [PATCH 0/3] perfmon x86 infrastructure definitions (take 2)

* stephane eranian <eranian@googlemail.com> wrote:

> Hello,
>
> Take 2: correct titles and no attachment.

note, all the patches were whitespace damaged (all tabs were spaces). I
fixed this up by hand but please check Documentation/email-clients.txt.

> Here is a small set of patches for x86. They are used by perfmon but
> they can be applied independently.
>
> patch 1: adds cpu_has_arch_perfmon to cpufeature macros to test for
> architectural perfmon on Intel processors
> patch 2: adds AMD Northbridge config MSR definition
> patch 3: adds AMD Northbridge PCI Id

i've added all three to x86.git for convenience, but the PCI ID will
need to go via Greg KH's PCI tree i suspect.

Ingo


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