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SubjectRe: [PATCH] Use global TLB flushes in MTRR code

* Andi Kleen <andi@firstfloor.org> wrote:

> > because it's not just an open-coded __tlb_flush_all(), it _disables PGE
> > and keeps it so while the MTRR's are changed on all CPUs_.
>
> Yes and?

your first patch was outright wrong then you declared the second one a
"cleanup" while it changes behavior: bad in my book ;-)

> > Your patch adds __flush_tlb_all() which re-enables the PGE bit in cr4,
> > see asm-x86/tlbflush.h:
> >
> > /* clear PGE */
> > write_cr4(cr4 & ~X86_CR4_PGE);
> > /* write old PGE again and flush TLBs */
> > write_cr4(cr4);
> >
> > so we'll keep PGE enabled during the MTRR setting - which changes
> > behavior.
>
> It changes behaviour in some minor ways but I don't think it makes any
> difference. PGE only influences TLB flushes (according to its
> specification) and all the TLB flushes still run with PGE disabled.

now that i pointed out the difference, your position changed to "changes
behavior in minor ways" ;-)

This is fragile code and almost nothing in the MTRR area is "minor", we
are just not touching this code unless it's really justified.

Ingo


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