Messages in this thread Patch in this message | | | Date | Sun, 3 Feb 2008 22:13:53 -0800 | From | "Russell Leidich" <> | Subject | [PATCH] Remove Barcelona Thermal Throttling |
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All,
You can imagine my dismay when I recently learned that, after all our collective effort, hardware thermal throttling does not work reliably on Barcelona, according to AMD. Due to NDA restrictions, I am unable to provide further details.
But the effort has not been a waste; whenever AMD manages to make a reliable hardware thermal sensor, this code should "just work" along with all the other northbridge initialization associated with the device IDs in k8_northbridges[].
This patch Blacklists Barcelona as non-hardware-thermal-throttlable (in addition to RevF, which was already blacklisted). On the recommendation of my colleagues, it also contains these politeness enhancements: (1) warns the user if the CPU is _not_ blacklisted, but the BIOS neglected to enable thermal throttling (as a safety measure) and (2) uses the PCI_SLOT macro instead of the more obnoxious shift-right-by-3 to compute PCI device numbers.
This patch assumes that it is being applied _after_ my previous patch has already been integrated. I mailed out that patch on 1/17/2008 with subject "Re: [PATCH] AMD Thermal Interrupt Support". -- Russell Leidich Signed-off-by: Russell Leidich <rml@google.com> --- linux-2.6.24-rc5.orig/arch/x86/kernel/cpu/mcheck/mce_amd_64 2008-02-03 21:17:58.186613000 -0800 +++ linux-2.6.24-rc5/arch/x86/kernel/cpu/mcheck/mce_amd_64.c 2008-02-03 21:51:38.810989000 -0800 @@ -742,13 +742,20 @@ static void smp_thermal_northbridge_init */ pci_read_config_dword(k8_northbridges[nb_num], THERM_CTL_F3X64, &therm_ctl_f3x64); - therm_ctl_f3x64 |= PSL_APIC_HI_EN | HTC_EN; + therm_ctl_f3x64 |= PSL_APIC_HI_EN; therm_ctl_f3x64 &= (~PSL_APIC_LO_EN); pci_write_config_dword(k8_northbridges[nb_num], THERM_CTL_F3X64, therm_ctl_f3x64); - printk(KERN_INFO "CPU thermal throttling interrupts enabled in " - "PCI bus 0x0, device 0x%x, function 0x3, register 0x64." - "\n", k8_northbridges[nb_num]->devfn >> 3); + if (therm_ctl_f3x64 & HTC_EN) + printk(KERN_INFO "CPU thermal throttling interrupts " + "enabled in PCI bus 0x0, device 0x%x, function " + "0x3, register 0x64.\n", + PCI_SLOT(k8_northbridges[nb_num]->devfn)); + else + printk(KERN_WARNING "CPU thermal throttling disabled by" + " the BIOS in PCI bus 0x0, device 0x%x, " + "function 0x3, register 0x64, bit 0x0.\n", + PCI_SLOT(k8_northbridges[nb_num]->devfn)); } } @@ -835,7 +842,7 @@ static void smp_thermal_early_throttle_c * corresponding APIC initialization on each core. * * Due to an erratum involving the thermal sensor, this code does not work on - * any CPU prior to Family 0x10. + * CPUs with certain northbridge device IDs, as coded below. */ static int smp_thermal_interrupt_init(void) { @@ -844,13 +851,15 @@ static int smp_thermal_interrupt_init(vo if (num_k8_northbridges == 0) goto out; /* - * If any of the northbridges has PCI ID 0x1103, then its thermal - * hardware suffers from an erratum which prevents this code from - * working, so abort. (This implies that it only works on Family - * 0x10.) + * If any of the northbridges has any of the device IDs in the following + * loop, then the hardware suffers from an erratum which prevents + * this code from working, so abort. */ for (nb_num = 0; nb_num < num_k8_northbridges; nb_num++) { - if ((k8_northbridges[nb_num]->device) == 0x1103) + __u32 device_id; + + device_id = k8_northbridges[nb_num]->device; + if ((device_id == 0x1103) || (device_id == 0x1203)) goto out; } /* | |