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SubjectRe: [patch 2/2] x86: apic: Extended interrupt LVT support for AMD Barcelona (32bit)

* Robert Richter <robert.richter@amd.com> wrote:

> /*
> + * Setup extended LVT, AMD specific (K8, family 10h)
> + *
> + * Vector mappings are hard coded. On K8 only offset 0 (APIC500) and
> + * MCE interrupts are supported. Thus MCE offset must be set to 0.
> + */

thanks, applied.

Ingo


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