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    SubjectRe: [ofa-general] Re: Demand paging for memory regions
    On Tue, 12 Feb 2008, Roland Dreier wrote:

    > I don't know anything about the T3 internals, but it's not clear that
    > you could do this without a new chip design in general. Lot's of RDMA
    > devices were designed expecting that when a packet arrives, the HW can
    > look up the bus address for a given memory region/offset and place the
    > packet immediately. It seems like a major change to be able to
    > generate a "page fault" interrupt when a page isn't present, or even
    > just wait to scatter some data until the host finishes updating page
    > tables when the HW needs the translation.

    Well if the VM wants to invalidate a page then the remote end first has to
    remove its mapping.

    If a page has been removed then the remote end would encounter a fault and
    then would have to wait for the local end to reestablish its mapping
    before proceeding.

    So the packet would only be generated when both ends are in sync.

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