Messages in this thread | | | Date | Thu, 20 Nov 2008 08:50:50 -0500 | From | "Mike Frysinger" <> | Subject | Re: [PATCH 2/5] Blackfin arch: SMP supporting patchset: Blackfin header files and machine common code |
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On Wed, Nov 19, 2008 at 02:42, Bryan Wu wrote: > On Wed, Nov 19, 2008 at 2:56 PM, Andrew Morton wrote: >> On Tue, 18 Nov 2008 17:05:05 +0800 Bryan Wu wrote: >>> From: Graf Yang <graf.yang@analog.com> >>> +#define smp_mb__before_clear_bit() barrier() >>> +#define smp_mb__after_clear_bit() barrier() >>> + >>> +static inline void __set_bit(int nr, volatile unsigned long *addr) >>> +{ >>> + int *a = (int *)addr; >>> + int mask; >>> + >>> + a += nr >> 5; >>> + mask = 1 << (nr & 0x1f); >>> + *a |= mask; >>> +} >>> + >>> +static inline void __clear_bit(int nr, volatile unsigned long *addr) >>> +{ >>> + int *a = (int *)addr; >>> + int mask; >>> + >>> + a += nr >> 5; >>> + mask = 1 << (nr & 0x1f); >>> + *a &= ~mask; >>> +} >>> + >>> +static inline void __change_bit(int nr, volatile unsigned long *addr) >>> +{ >>> + int mask; >>> + unsigned long *ADDR = (unsigned long *)addr; >>> + >>> + ADDR += nr >> 5; >>> + mask = 1 << (nr & 31); >>> + *ADDR ^= mask; >>> +} >> >> I'm surprised there isn't any generic code which can be used for the above. >> > > As Nick said, include/asm-generic/bitops/non-atomic.h is the generic code. > We will try it.
the Blackfin ISA provides explicit bit operations. is there something special about these C-level bit operations that prevents us from using them ?
PRM: "BITCLR" on page 13-2 "BITSET" on page 13-4 "BITTGL" on page 13-6 -mike
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