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SubjectRe: [PATCH] sparse_irq aka dyn_irq v13
Yinghai Lu wrote:
> H. Peter Anvin wrote:
>
>> Yinghai Lu wrote:
>>
>>> H. Peter Anvin wrote:
>>>
>>>> Yinghai Lu wrote:
>>>>
>>>>> 2. make irq number is bus/devfn/idx, and every dev func will use 12bit range, irq number is relatively fixed not like current MSI irq creating is some kind of floating from NR_IRQS too.
>>>>>
>>>> 2 is *STILL WRONG*, dammit!
>>>>
>>>> You keep bringing this one up, but our PCI addressing is
>>>> *DOMAIN*/bus/devfn -- it falls flat on its face when you have more than
>>>> 16 PCI domains. CAN WE PLEASE STOP WITH THIS FOOLISHNESS NOW!
>>>>
>>> you want to u64 instead of unsigned int for irq?
>>>
>>>
>> No, I think the whole notion of a static *numeric* identifier for an IRQ
>> when it's something like MSI-X is simply pointless. I think we should
>> assign IRQ numbers beyond the legacy range dynamically.
>>
>> I really don't think anyone gives a hoot about the IRQ number for any
>> IRQ above the 0-15 legacy range, even including the "APIC" numbers 16+.
>>
>
> you want to change ioapic/pin to irq mapping too?
>

I would like to see that. I'm already doing this in the Xen dom0 code
interrupt code that I posted the other day.

J


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