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SubjectRe: sched: deep power-saving states
On Wed, 22 Oct 2008 10:26:49 -0400
Gregory Haskins <> wrote:
steps, so it'll be
> > faster)
> [Adding Peter Zijlstra to the thread]
> Ah, yes of course! That makes sense. So I have to admit I am fairly
> ignorant of the ACPI C-state stuff, so I just read up on it. In the
> context of what you said, it makes perfect sense to me now.
> IIUC, the OS selects which C-state it will enter at idle points based
> on some internal criteria (TBD). All we have to do is remap the
> cpupri "IDLE" state to something like IDLE-C1, IDLE-C2, ..., IDLE-Cn
> and have the cpupri map get updated coincident with the pm_idle()
> call. Then the scheduler will naturally favor cores that are in
> lighter sleep over cores in deep sleep.
> I am not sure if this is exactly what you were getting at during the
> conf, since it doesnt really consider deep-sleep latency times
> directly. But I think this is a step in the right direction.

it for sure is a step in the right direction.
the actual exit costs are an optional parameter in this sense,
the steps between C states are non-linear (more like exponential)
so knowing the actual numbers could be used. but even if you don't
use it, it still makes sense and is a very good first order behavior.

Arjan van de Ven Intel Open Source Technology Centre
For development, discussion and tips for power savings,

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