Messages in this thread | | | Date | Fri, 10 Oct 2008 15:14:05 +0400 | From | "Cyrill Gorcunov" <> | Subject | Re: [PATCH] Typo in x86 apic.c with DIVISOR setup |
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On Fri, Oct 10, 2008 at 1:01 PM, Ingo Molnar <mingo@elte.hu> wrote: > > * Cyrill Gorcunov <gorcunov@gmail.com> wrote: > >> Ah, it was CONFG who is guilty :) This is true indeed, thanks! > > yeah. > >> But here is not the same >> >> apic_write(APIC_TDCR, >> (tmp_value & ~(APIC_TDR_DIV_1 | APIC_TDR_DIV_TMBASE)) | >> - APIC_TDR_DIV_16); >> + APIC_TDR_DIV); >> >> On x86_64 it will be 1 now but we've used 16 for a long time in >> purpose to slowdown processor's bus CLKs from APIC point of view. So I >> don't think it's good idea to change it now. If we start using divisor >> 1 today -- it would work for some time 'till processor bus raised to >> the some speed when we'll get counter underflow before calibration >> finished. >> >> So could you please split the patch into two: >> 1) Plain CONFG typo fix (which is completely Ack'ed) >> 2) APIC divisor patch (which I'm not sure if we've to touch) > > okay, since we typoed that CONFG thing (sidenote: we really need a > .config flag that will start a grep that fails the build if there's a > non-existent CONFIG option anywhere in the tree), we basically tested > the divisor of 16 on a wide range of boxes. > > So .. how about just standardizing on the divisor of 16 on both 32-bit > and 64-bit? > > Ingo >
I think the best approach would be to use divisor 16 and initial counter value set to 0xFFFFFFFF while doing APIC timer calibration cycle (iirc there was a SMI related patch at August had been doing such a thing -- can't remember the LKML ref to it). Or you meant something different?
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