Messages in this thread | | | Date | Fri, 4 Jan 2008 09:40:43 +0100 | From | Ingo Molnar <> | Subject | Re: [PATCH] [18/20] x86: Don't disable TSC in any C states on AMD Fam10h |
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* Andi Kleen <ak@suse.de> wrote:
> The ACPI code currently disables TSC use in any C2 and C3 states. But > the AMD Fam10h BKDG documents that the TSC will never stop in any C > states when the CONSTANT_TSC bit is set. Make this disabling > conditional on CONSTANT_TSC not set on AMD. > > I actually think this is true on Intel too for C2 states on CPUs with > p-state invariant TSC, but this needs further discussions with Len to > really confirm :-) > > So far it is only enabled on AMD.
thanks Andi - i've picked this up for x86.git, to get it tested. Len, what do you think? If/when you pick it up into the ACPI tree i'll drop it from x86.git.
Ingo
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