Messages in this thread | | | Date | Wed, 16 Jan 2008 21:28:20 +0100 | From | Ingo Molnar <> | Subject | Re: [PATCH] x86: fix detection of CONSTANT_TSC bit for AMD CPUs |
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* Andreas Herrmann <andreas.herrmann3@amd.com> wrote:
> Commits > - c52f61fcbdb2aa84f0e4d831ef07f375e6b99b2c > (x86: allow TSC clock source on AMD Fam10h and some cleanup) > - e30436f05d456efaff77611e4494f607b14c2782 > (x86: move X86_FEATURE_CONSTANT_TSC into early cpu feature detection) > > are supposed to fix the detection of contant TSC for AMD CPUs. > Unfortunately on x86_64 it does still not work with current x86/mm. > For a Phenom I still get: > > ... > TSC calibrated against PM_TIMER > Marking TSC unstable due to TSCs unsynchronized > time.c: Detected 2288.366 MHz processor. > ... > > We have to set c->x86_power in early_identify_cpu to properly detect > the CONSTANT_TSC bit in early_init_amd. > > Attached patch fixes this issue. Following the relevant boot > messages when the fix is used: > > ... > TSC calibrated against PM_TIMER > time.c: Detected 2288.279 MHz processor. > ... > Initializing CPU#1 > ... > checking TSC synchronization [CPU#0 -> CPU#1]: passed. > ... > Initializing CPU#2 > ... > checking TSC synchronization [CPU#0 -> CPU#2]: passed. > ... > Booting processor 3/4 APIC 0x3 > ... > checking TSC synchronization [CPU#0 -> CPU#3]: passed. > Brought up 4 CPUs > ... > > Patch is against x86/mm (v2.6.24-rc8-672-ga9f7faa). > Please apply.
thanks, applied.
Ingo
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