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SubjectRe: [PATCH] pcmcia: Add support P2CCLK bit enabler for TI PC1520
On Sat, 12 Jan 2008 10:04:11 +0900
"Nobuhiro Iwamatsu" <iwamatsu@nigauri.org> wrote:

> 2007/12/26, Andrew Morton <akpm@linux-foundation.org>:
> > On Tue, 18 Dec 2007 18:57:24 +0900 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> wrote:
> >
> > > There is a device that doesn't work when P2CCLK's bit of TI PC1520 was disable.
> > > This patch supports P2CCLK bit enabler for TI PC1520.
> > >
> > > ...
> > >
> > > config YENTA_TOSHIBA
> > > default y
> > > bool "Special initialization for Toshiba ToPIC bridges" if EMBEDDED
> > > diff --git a/drivers/pcmcia/ti113x.h b/drivers/pcmcia/ti113x.h
> > > index d29657b..ea749e8 100644
> > > --- a/drivers/pcmcia/ti113x.h
> > > +++ b/drivers/pcmcia/ti113x.h
> > > @@ -59,6 +59,7 @@
> > > #define TI122X_SCR_SER_STEP 0xc0000000
> > > #define TI122X_SCR_INTRTIE 0x20000000
> > > #define TIXX21_SCR_TIEALL 0x10000000
> > > +#define TI122X_SCR_P2CCLK 0x08000000
> > > #define TI122X_SCR_CBRSVD 0x00400000
> > > #define TI122X_SCR_MRBURSTDN 0x00008000
> > > #define TI122X_SCR_MRBURSTUP 0x00004000
> > > @@ -822,6 +823,13 @@ static int ti12xx_override(struct yenta_socket *socket)
> > > printk(KERN_INFO "Yenta: Enabling burst memory read transactions\n");
> > > val |= TI122X_SCR_MRBURSTUP;
> > > }
> > > +
> > > +#ifdef CONFIG_YENTA_TI_P2CCLK
> > > + if ( !(val & TI122X_SCR_P2CCLK)) {
> > > + printk(KERN_INFO "Yenta: Clock generated by internal oscillator\n");
> > > + val |= TI122X_SCR_P2CCLK;
> > > + }
> > > +#endif
> > > if (val_orig != val)
> > > config_writel(socket, TI113X_SYSTEM_CONTROL, val);
> >
> > It would be much better if we cold do this without the config option: just
> > detect the appropriate device and make it work.
>
> This bit is enable for PC in BIOS.
> However, I think that I want to control even by the kernel in
> building in because it is a boot loader situation.
>
> I think that this will not be able to be done by automatic.
>
> Please apply this patch.
>

What does the TI122X_SCR_P2CCLK bit do?

The printk which you're adding is ambiguous. Does it mean that the clock
is already generated by the internal oscillator, or that it is not, and
that the kernel is now arranging for it to be generated by the internal
oscillator?

What did the BIOS actually do? Did it enable an external oscillator when
the motherboard doesn't actually connect an oscillator to the
external-oscillator pin? Or what?

So. Please generally tell us (completely) what the problem is, and how
this patch attempts to fix it. Please also fully explain why we cannot
fix this problem without resorting to a config option, because avoiding
the config option is highly desirable.

Please bear in mind that this part of the kernel is effectively
unmaintained, so poor ignorant people like me need to try to look after it
so I need to be carefully educated about what's going on.

Thanks.



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